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4a9e89a3e3
Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the clock controller significantly. We added a CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits. Now the Allwinner D1 changes the memory map again, and also extends the pincontroller, among other peripherals. To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol, this name is reportedly used in the Allwinner BSP code, and prevents us from inventing our own name. Add this new symbol to some guards that were already checking for the H6 generation, since many features are shared between the two (like the renovated clock controller). This paves the way to introduce a first user of this generation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
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.. | ||
cpu | ||
dts | ||
include | ||
lib | ||
mach-apple | ||
mach-aspeed | ||
mach-at91 | ||
mach-bcm283x | ||
mach-bcmbca | ||
mach-bcmstb | ||
mach-cortina | ||
mach-davinci | ||
mach-exynos | ||
mach-highbank | ||
mach-histb | ||
mach-hpe | ||
mach-imx | ||
mach-integrator | ||
mach-ipq40xx | ||
mach-k3 | ||
mach-keystone | ||
mach-kirkwood | ||
mach-lpc32xx | ||
mach-mediatek | ||
mach-meson | ||
mach-mvebu | ||
mach-nexell | ||
mach-npcm | ||
mach-octeontx | ||
mach-octeontx2 | ||
mach-omap2 | ||
mach-orion5x | ||
mach-owl | ||
mach-qemu | ||
mach-rmobile | ||
mach-rockchip | ||
mach-s5pc1xx | ||
mach-snapdragon | ||
mach-socfpga | ||
mach-sti | ||
mach-stm32 | ||
mach-stm32mp | ||
mach-sunxi | ||
mach-tegra | ||
mach-u8500 | ||
mach-uniphier | ||
mach-versal | ||
mach-versal-net | ||
mach-versatile | ||
mach-zynq | ||
mach-zynqmp | ||
mach-zynqmp-r5 | ||
thumb1/include/asm/proc-armv | ||
config.mk | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |