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https://github.com/AsahiLinux/u-boot
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b8cdd01462
Key Features include of the P1010: * e500v2 core frequency operation of 500 to 800 MHz * Power consumption less than 5.0 W at 800 MHz core speed * Dual SATA 3 Gbps controllers with integrated PHY * Dual PCI Express controllers * Three 10/100/1000 Mbps enhanced triple-speed Ethernet controllers (eTSECs) * TCP/IP acceleration and classification capabilities * IEEE 1588 support * Lossless flow control * RGMII, SGMII * DDR3 with support for a 32-bit data interface (40 bits including ECC), up to 800 MHz data rate 32/16-bit DDR3 memory controller * Dedicated security engine featuring trusted boot * TDM interface * Dual controller area networks (FlexCAN) controller * SD/MMC card controller supporting booting from Flash cards * USB 2.0 host and device controller with an on-chip, high-speed PHY * Integrated Flash controller (IFC) * Power Management Controller (PMC) * Four-channel, general-purpose DMA controller * I2C controller * Serial peripheral interface (SPI) controller with master and slave support * System timers including a periodic interrupt timer, real-time clock, software watchdog timer, and four general-purpose timers * Dual DUARTs Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
122 lines
3.6 KiB
Makefile
122 lines
3.6 KiB
Makefile
#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2002,2003 Motorola Inc.
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# Xianghua Xiao,X.Xiao@motorola.com
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(CPU).o
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START = start.o resetvec.o
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SOBJS-$(CONFIG_MP) += release.o
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SOBJS = $(SOBJS-y)
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COBJS-$(CONFIG_CMD_ERRATA) += cmd_errata.o
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COBJS-$(CONFIG_CPM2) += commproc.o
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# supports ddr1
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COBJS-$(CONFIG_MPC8540) += ddr-gen1.o
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COBJS-$(CONFIG_MPC8560) += ddr-gen1.o
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COBJS-$(CONFIG_MPC8541) += ddr-gen1.o
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COBJS-$(CONFIG_MPC8555) += ddr-gen1.o
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# supports ddr1/2
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COBJS-$(CONFIG_MPC8548) += ddr-gen2.o
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COBJS-$(CONFIG_MPC8568) += ddr-gen2.o
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COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
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# supports ddr1/2/3
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COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
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COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
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COBJS-$(CONFIG_MPC8569) += ddr-gen3.o
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COBJS-$(CONFIG_P1010) += ddr-gen3.o
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COBJS-$(CONFIG_P1011) += ddr-gen3.o
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COBJS-$(CONFIG_P1012) += ddr-gen3.o
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COBJS-$(CONFIG_P1013) += ddr-gen3.o
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COBJS-$(CONFIG_P1020) += ddr-gen3.o
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COBJS-$(CONFIG_P1021) += ddr-gen3.o
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COBJS-$(CONFIG_P1022) += ddr-gen3.o
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COBJS-$(CONFIG_P2010) += ddr-gen3.o
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COBJS-$(CONFIG_P2020) += ddr-gen3.o
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COBJS-$(CONFIG_PPC_P3041) += ddr-gen3.o
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COBJS-$(CONFIG_PPC_P4080) += ddr-gen3.o
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COBJS-$(CONFIG_PPC_P5020) += ddr-gen3.o
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COBJS-$(CONFIG_CPM2) += ether_fcc.o
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COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
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COBJS-$(CONFIG_FSL_CORENET) += liodn.o
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COBJS-$(CONFIG_MP) += mp.o
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COBJS-$(CONFIG_PCI) += pci.o
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COBJS-$(CONFIG_FSL_CORENET) += portals.o
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# various SoC specific assignments
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COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
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COBJS-$(CONFIG_QE) += qe_io.o
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COBJS-$(CONFIG_CPM2) += serial_scc.o
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COBJS-$(CONFIG_FSL_CORENET) += fsl_corenet_serdes.o
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# SoC specific SERDES support
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COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
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COBJS-$(CONFIG_MPC8544) += mpc8544_serdes.o
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COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
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COBJS-$(CONFIG_MPC8568) += mpc8568_serdes.o
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COBJS-$(CONFIG_MPC8569) += mpc8569_serdes.o
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COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o
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COBJS-$(CONFIG_P1011) += p1021_serdes.o
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COBJS-$(CONFIG_P1012) += p1021_serdes.o
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COBJS-$(CONFIG_P1013) += p1013_serdes.o
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COBJS-$(CONFIG_P1020) += p1021_serdes.o
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COBJS-$(CONFIG_P1021) += p1021_serdes.o
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COBJS-$(CONFIG_P1022) += p1022_serdes.o
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COBJS-$(CONFIG_P2010) += p2020_serdes.o
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COBJS-$(CONFIG_P2020) += p2020_serdes.o
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COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
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COBJS = $(COBJS-y)
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COBJS += cpu.o
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COBJS += cpu_init.o
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COBJS += cpu_init_early.o
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COBJS += interrupts.o
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COBJS += speed.o
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COBJS += tlb.o
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COBJS += traps.o
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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START := $(addprefix $(obj),$(START))
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all: $(obj).depend $(START) $(LIB)
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$(LIB): $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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