u-boot/arch/arm/cpu/armv7/omap5
Lubomir Popov b558af8128 ARM: OMAP5: DRA7xx: Add support for power rail grouping
On the DRA72x (J6Eco) EVM one PMIC SMPS is powering three SoC
core rails. This concept of using one SMPS to supply multiple
core domains (in various, although limited combinations, per
primary device use case) has now become common and is used by
many customer J6/J6Eco designs; it is supported by a number of
corresponding PMIC OTP versions.

This patch implements correct operation of the core voltages
scaling routine by ensuring that each SMPS that is supplying
more than one domain shall be written only once, and with the
highest voltage of those fused in the SoC (or of those defined
in the corresponding header if fuse read is disabled or fails)
for the power rails belonging to the group.

The patch also replaces some PMIC-related magic numbers with
the appropriate definitions. The default OPP_NOM voltages for
the DRA7xx SoCs are updated as well, per the latest DMs.

Signed-off-by: Lubomir Popov <l-popov@ti.com>
2015-01-29 12:00:49 -05:00
..
abb.c DRA7: add ABB setup for MPU voltage domain 2014-01-24 11:41:17 -05:00
config.mk kbuild: use shorten logs for mkimage rules 2014-02-25 11:01:29 -05:00
emif.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
hw_data.c ARM: OMAP5: DRA7xx: Add support for power rail grouping 2015-01-29 12:00:49 -05:00
hwinit.c ARM: DRA72x: Add Silicon ID support 2014-05-23 19:40:04 -04:00
Kconfig beagle_x15: add board support for Beagle x15 2014-12-04 11:04:39 -05:00
Makefile armv7: convert makefiles to Kbuild style 2013-10-31 12:53:39 -04:00
prcm-regs.c arm: dra7xx: prcm: add missing registers 2014-12-04 11:04:13 -05:00
sdram.c arm: omap5: sdram: mark emif_get_ext_phy_ctrl_const_regs __weak 2014-12-04 11:04:14 -05:00