mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 17:07:38 +00:00
bd483b7a9f
Synchronise device tree with linux-next next-20220708. Please note that this also means that instead of the previous "generic" U-Boot specific carrier board agnostic device tree we are now using the regular one for the Colibri Evaluation (carrier) board V3 (e.g. imx6dl-colibri-eval-v3.dtb rather than the previous imx6-colibri.dtb). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
157 lines
2.7 KiB
Text
157 lines
2.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
/*
|
|
* Copyright 2014-2022 Toradex
|
|
* Copyright 2012 Freescale Semiconductor, Inc.
|
|
* Copyright 2011 Linaro Ltd.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/interrupt-controller/irq.h>
|
|
#include "imx6dl.dtsi"
|
|
#include "imx6qdl-colibri.dtsi"
|
|
|
|
/ {
|
|
model = "Toradex Colibri iMX6DL/S on Colibri Evaluation Board V3";
|
|
compatible = "toradex,colibri_imx6dl-eval-v3", "toradex,colibri_imx6dl",
|
|
"fsl,imx6dl";
|
|
|
|
aliases {
|
|
i2c0 = &i2c2;
|
|
i2c1 = &i2c3;
|
|
};
|
|
|
|
aliases {
|
|
rtc0 = &rtc_i2c;
|
|
rtc1 = &snvs_rtc;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
/* Fixed crystal dedicated to mcp251x */
|
|
clk16m: clock-16m {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <16000000>;
|
|
clock-output-names = "clk16m";
|
|
};
|
|
};
|
|
|
|
/* Colibri SSP */
|
|
&ecspi4 {
|
|
status = "okay";
|
|
|
|
mcp251x0: mcp251x@0 {
|
|
compatible = "microchip,mcp2515";
|
|
clocks = <&clk16m>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <27 0x2>;
|
|
reg = <0>;
|
|
spi-max-frequency = <10000000>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
/*
|
|
* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
|
|
*/
|
|
&i2c3 {
|
|
status = "okay";
|
|
|
|
/* M41T0M6 real time clock on carrier board */
|
|
rtc_i2c: rtc@68 {
|
|
compatible = "st,m41t0";
|
|
reg = <0x68>;
|
|
};
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <
|
|
&pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2
|
|
&pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
|
|
&pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
|
|
&pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
|
|
>;
|
|
};
|
|
|
|
&pwm1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm4 {
|
|
status = "okay";
|
|
};
|
|
|
|
®_usb_host_vbus {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
vbus-supply = <®_usb_host_vbus>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
status = "okay";
|
|
};
|
|
|
|
/* Colibri MMC */
|
|
&usdhc1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&weim {
|
|
status = "okay";
|
|
|
|
/* weim memory map: 32MB on CS0, CS1, CS2 and CS3 */
|
|
ranges = <0 0 0x08000000 0x02000000
|
|
1 0 0x0a000000 0x02000000
|
|
2 0 0x0c000000 0x02000000
|
|
3 0 0x0e000000 0x02000000>;
|
|
|
|
/* SRAM on Colibri nEXT_CS0 */
|
|
sram@0,0 {
|
|
compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
|
|
reg = <0 0 0x00010000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
bank-width = <2>;
|
|
fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
|
|
0x00000000 0x04000040 0x00000000>;
|
|
};
|
|
|
|
/* SRAM on Colibri nEXT_CS1 */
|
|
sram@1,0 {
|
|
compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
|
|
reg = <1 0 0x00010000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
bank-width = <2>;
|
|
fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
|
|
0x00000000 0x04000040 0x00000000>;
|
|
};
|
|
};
|