u-boot/board/freescale/ls1088a/ls1088a_qixis.h
Chuanhua Han 1748990ab2 armv8: ls1088aqds: support DSPI mode by hwconfig
BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used
to control SPI and other IP signal routing.

USBOSC:
0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz.
SPI devices are unusable in this mode.
1= SPI_CLK used as SPI clock.
SPI devices are usable in this mode. USB block is clocked from
internal sources

SPR[3:2]:
SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]):
00= SDHC/eMMC 8-bit
01= SD Card Rev 2.0/3.0
10= SPI on-board memory
11= TDM Riser / SPI off-board connector.
The default value is 00 if an SDCard/eMMC card is selected as the boot
device.

SPR[1:0]:
SPI_SIN/SOUT/SCK Routing (schematic net CFG_SPI_ROUTE[1:0]):
00= SDHC Sync loop
01= TDM Riser / SPI off-board connector.
10= SPI on-board memory.
11= SPI off-board connector.

By default, the SPI feature is not available, so we need to configure
the above register fields to select the route to the SPI feature.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30

55 lines
1.2 KiB
C

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2017 NXP
*/
#ifndef __LS1088AQDS_QIXIS_H__
#define __LS1088AQDS_QIXIS_H__
/* Definitions of QIXIS Registers for LS1088AQDS */
/* SYSCLK */
#define QIXIS_SYSCLK_66 0x0
#define QIXIS_SYSCLK_83 0x1
#define QIXIS_SYSCLK_100 0x2
#define QIXIS_SYSCLK_125 0x3
#define QIXIS_SYSCLK_133 0x4
#define QIXIS_SYSCLK_150 0x5
#define QIXIS_SYSCLK_160 0x6
#define QIXIS_SYSCLK_166 0x7
/* DDRCLK */
#define QIXIS_DDRCLK_66 0x0
#define QIXIS_DDRCLK_100 0x1
#define QIXIS_DDRCLK_125 0x2
#define QIXIS_DDRCLK_133 0x3
/* BRDCFG2 - SD clock*/
#define QIXIS_SDCLK1_100 0x0
#define QIXIS_SDCLK1_125 0x1
#define QIXIS_SDCLK1_165 0x2
#define QIXIS_SDCLK1_100_SP 0x3
#define BRDCFG4_EMISEL_MASK 0xE0
#define BRDCFG4_EMISEL_SHIFT 5
#define BRDCFG9_SFPTX_MASK 0x10
#define BRDCFG9_SFPTX_SHIFT 4
/* Definitions of QIXIS Registers for LS1088ARDB */
/* BRDCFG5 */
#define BRDCFG5_SPISDHC_MASK 0x0C
#define BRDCFG5_FORCE_SD 0x08
/* Definitions of QIXIS Registers for LS1088AQDS */
/* BRDCFG4 */
#define BRDCFG4_USBOSC_MASK 0x01
#define BRDCFG4_SPI 0x01
/* BRDCFG5 */
#define BRDCFG5_SPR_MASK 0x0f
#define BRDCFG5_SPI_ON_BOARD 0x0a
#define BRDCFG5_SPI_OFF_BOARD 0x0f
#endif