Michal Simek 7576ab2fac riscv: Add support for AMD/Xilinx MicroBlaze V ... MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. The patch contains initial wiring and configuration for initial HW design with memory, cpu, interrupt controller, timers and uartlite console (interrupt controller is listed but U-Boot is not using it). Provided DT is just describing one configuration and should be taken only as example. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>		2023-12-18 11:08:49 +08:00
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bootscripts	xilinx: Add sd boot command script for reference	2019-10-08 09:11:13 +02:00
common	riscv: Add support for AMD/Xilinx MicroBlaze V	2023-12-18 11:08:49 +08:00
mbv	riscv: Add support for AMD/Xilinx MicroBlaze V	2023-12-18 11:08:49 +08:00
microblaze-generic	microblaze: Remove common.h usage	2023-10-24 16:34:45 -04:00
versal	treewide: Tidy up semicolon after command macros	2023-12-13 11:51:24 -05:00
versal-net	arm64: versal: Add SelectMAP boot mode identification	2023-10-09 13:03:23 +02:00
zynq	xilinx: zynq: Generate dfu for SPI only when enabled	2023-12-13 08:58:06 +01:00
zynqmp	Xilinx changes for v2024.04-rc1	2023-12-14 13:27:11 -05:00
zynqmp_r5	.mailmap: Start to use new amd.com email address	2022-04-19 14:51:11 -04:00
Kconfig	riscv: Add support for AMD/Xilinx MicroBlaze V	2023-12-18 11:08:49 +08:00