mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
Xilinx changes for v2024.04-rc1
zynqmp: - Introduce Kria specific defconfig - Calculate SPI image location based on boot offset - DT updates zynqmp-clk: - Fix topsw_lsbus_clock for DP axi-enet: - Support older DT binding mailbox: - Add support for multiple mailboxes pcie-xilinx: - Covert driver to newer interface - Enable MMIO region zynq: - dfu updates - Enable capsule update for Antminer S9 - DT updates xilinx_spi: - Add new xfer callback and support runtime fifo depth discovery -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZXsiwgAKCRDKSWXLKUoM IUaSAJ4/8Ku3aUP/wDnRZmIIziw36I7WOwCeJrqfPSoYhPG+XCJhPQ076wid9cw= =PHig -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2024.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2024.04-rc1 zynqmp: - Introduce Kria specific defconfig - Calculate SPI image location based on boot offset - DT updates zynqmp-clk: - Fix topsw_lsbus_clock for DP axi-enet: - Support older DT binding mailbox: - Add support for multiple mailboxes pcie-xilinx: - Covert driver to newer interface - Enable MMIO region zynq: - dfu updates - Enable capsule update for Antminer S9 - DT updates xilinx_spi: - Add new xfer callback and support runtime fifo depth discovery
This commit is contained in:
Tom Rini
commit
fa3f19aa56
28 changed files with 577 additions and 81 deletions
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@ -49,7 +49,6 @@
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ethernet_phy: ethernet-phy@1 {
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reg = <1>;
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device_type = "ethernet-phy";
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};
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};
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@ -48,7 +48,6 @@
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ethernet_phy: ethernet-phy@0 {
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reg = <0>;
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device_type = "ethernet-phy";
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};
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};
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@ -88,7 +88,6 @@
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ethernet_phy: ethernet-phy@7 {
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reg = <7>;
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device_type = "ethernet-phy";
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};
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};
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@ -49,7 +49,6 @@
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ethernet_phy: ethernet-phy@7 {
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reg = <7>;
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device_type = "ethernet-phy";
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};
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};
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@ -46,7 +46,6 @@
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ethernet_phy: ethernet-phy@7 {
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reg = <7>;
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device_type = "ethernet-phy";
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};
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};
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@ -41,7 +41,6 @@
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ethernet_phy: ethernet-phy@7 {
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reg = <7>;
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device_type = "ethernet-phy";
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};
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};
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@ -44,7 +44,6 @@
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ethernet_phy: ethernet-phy@0 {
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reg = <0>;
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device_type = "ethernet-phy";
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};
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};
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@ -55,7 +55,6 @@
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ethernet_phy: ethernet-phy@0 {
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reg = <0>;
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device_type = "ethernet-phy";
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};
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};
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@ -45,7 +45,6 @@
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ethernet_phy: ethernet-phy@0 {
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reg = <0>;
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device_type = "ethernet-phy";
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};
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};
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@ -311,13 +311,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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clock_8t49n287: clock-generator@6c { /* u39 8T49N240 */
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#clock-cells = <1>; /* author David Cater <david.cater@idt.com>*/
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compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */
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reg = <0x6c>;
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/* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */
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/* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */
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};
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/* u39 8T49N240 */
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};
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i2c@3 { /* PMBUS2_INA226 */
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#address-cells = <1>;
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@ -532,15 +532,7 @@
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/* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
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/* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */
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/* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
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clock_8t49n287: clock-generator@60 { /* u39 8T49N240 - pcie clocking 3 */
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#clock-cells = <1>; /* author David Cater <david.cater@idt.com>*/
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compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */
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reg = <0x60>;
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/* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */
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/* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */
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};
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/* u39 8T49N240 - pcie clocking 3 */
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};
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};
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};
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@ -87,7 +87,7 @@
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phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
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reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>;
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assigned-clock-rates = <250000000>, <20000000>;
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#if 0
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usbhub0: usb-hub { /* u36 */
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i2c-bus = <&i2c1>;
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compatible = "microchip,usb5744";
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@ -98,6 +98,7 @@
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compatible = "microchip,usb2244";
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reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>;
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};
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#endif
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};
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&dwc3_0 {
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@ -139,7 +139,7 @@
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phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
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reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>;
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assigned-clock-rates = <250000000>, <20000000>;
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#if 0
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usbhub0: usb-hub { /* u43 */
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i2c-bus = <&usbhub_i2c0>;
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compatible = "microchip,usb5744";
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@ -150,6 +150,7 @@
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compatible = "microchip,usb2244";
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reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>;
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};
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#endif
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};
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&dwc3_0 {
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@ -139,7 +139,7 @@
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phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
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reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>;
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assigned-clock-rates = <250000000>, <20000000>;
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#if 0
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usbhub0: usb-hub { /* u43 */
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i2c-bus = <&usbhub_i2c0>;
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compatible = "microchip,usb5744";
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@ -150,6 +150,7 @@
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compatible = "microchip,usb2244";
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reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>;
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};
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#endif
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};
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&dwc3_0 {
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@ -131,10 +131,12 @@
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pinctrl-0 = <&pinctrl_usb0_default>;
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phy-names = "usb3-phy";
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phys = <&psgtr 2 PHY_TYPE_USB3 0 1>;
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#if 0
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usbhub: usb5744 { /* u43 */
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compatible = "microchip,usb5744";
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reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
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};
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#endif
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};
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&dwc3_0 {
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@ -113,13 +113,14 @@
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phy-names = "usb3-phy";
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phys = <&psgtr 2 PHY_TYPE_USB3 0 1>;
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assigned-clock-rates = <250000000>, <20000000>;
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#if 0
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usb5744: usb-hub { /* u43 */
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status = "okay";
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compatible = "microchip,usb5744";
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i2c-bus = <&i2c1>;
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reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
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};
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#endif
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};
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&dwc3_0 {
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@ -148,6 +148,7 @@
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ipi_mailbox_pmu1: mailbox@ff9905c0 {
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bootph-all;
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compatible = "xlnx,zynqmp-ipi-dest-mailbox";
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reg = <0x0 0xff9905c0 0x0 0x20>,
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<0x0 0xff9905e0 0x0 0x20>,
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<0x0 0xff990e80 0x0 0x20>,
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@ -184,6 +184,7 @@ void set_dfu_alt_info(char *interface, char *devstr)
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"mmc 0=boot.bin fat 0 1;"
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"%s fat 0 1", CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
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break;
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#if defined(CONFIG_SPL_SPI_LOAD)
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case ZYNQ_BM_QSPI:
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snprintf(buf, DFU_ALT_BUF_LEN,
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"sf 0:0=boot.bin raw 0 0x1500000;"
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@ -191,6 +192,7 @@ void set_dfu_alt_info(char *interface, char *devstr)
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CONFIG_SPL_FS_LOAD_PAYLOAD_NAME,
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CONFIG_SYS_SPI_U_BOOT_OFFS);
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break;
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#endif
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default:
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return;
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}
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@ -681,3 +681,18 @@ void set_dfu_alt_info(char *interface, char *devstr)
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puts("DFU alt info setting: done\n");
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}
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#endif
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#if defined(CONFIG_SPL_SPI_LOAD)
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unsigned int spl_spi_get_uboot_offs(struct spi_flash *flash)
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{
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u32 offset;
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int multiboot = multi_boot();
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offset = multiboot * SZ_32K;
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offset += CONFIG_SYS_SPI_U_BOOT_OFFS;
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log_info("SPI offset:\t0x%x\n", offset);
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return offset;
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}
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#endif
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66
board/xilinx/zynqmp/zynqmp_kria.env
Normal file
66
board/xilinx/zynqmp/zynqmp_kria.env
Normal file
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@ -0,0 +1,66 @@
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autoload=no
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baudrate=115200
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boot_a_script=load ${devtype} ${devnum}:${distro_bootpart} ${scriptaddr} ${prefix}${script}; source ${scriptaddr}
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boot_efi_binary=if fdt addr ${fdt_addr_r}; then bootefi bootmgr ${fdt_addr_r};else bootefi bootmgr ${fdtcontroladdr};fi;load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} efi/boot/bootaa64.efi; if fdt addr ${fdt_addr_r}; then bootefi ${kernel_addr_r} ${fdt_addr_r};else bootefi ${kernel_addr_r} ${fdtcontroladdr};fi
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boot_extlinux=sysboot ${devtype} ${devnum}:${distro_bootpart} any ${scriptaddr} ${prefix}${boot_syslinux_conf}
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boot_net_usb_start=usb start
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boot_prefixes=/ /boot/
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boot_script_dhcp=boot.scr.uimg
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boot_scripts=boot.scr.uimg boot.scr
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boot_syslinux_conf=extlinux/extlinux.conf
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bootcmd_dhcp=run boot_net_usb_start; if dhcp ${scriptaddr} ${boot_script_dhcp}; then source ${scriptaddr}; fi;setenv efi_fdtfile ${fdtfile}; setenv efi_old_vci ${bootp_vci};setenv efi_old_arch ${bootp_arch};setenv bootp_vci PXEClient:Arch:00011:UNDI:003000;setenv bootp_arch 0xb;if dhcp ${kernel_addr_r}; then tftpboot ${fdt_addr_r} dtb/${efi_fdtfile};if fdt addr ${fdt_addr_r}; then bootefi ${kernel_addr_r} ${fdt_addr_r}; else bootefi ${kernel_addr_r} ${fdtcontroladdr};fi;fi;setenv bootp_vci ${efi_old_vci};setenv bootp_arch ${efi_old_arch};setenv efi_fdtfile;setenv efi_old_arch;setenv efi_old_vci;
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bootcmd_jtag=echo JTAG: Trying to boot script at ${scriptaddr} && source ${scriptaddr}; echo JTAG: SCRIPT FAILED: continuing...;
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bootcmd_mmc0=devnum=0; run mmc_boot
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bootcmd_mmc1=devnum=1; run mmc_boot
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bootcmd_pxe=run boot_net_usb_start; dhcp; if pxe get; then pxe boot; fi
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bootcmd_usb0=devnum=0; run usb_boot
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bootcmd_usb1=devnum=1; run usb_boot
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bootcmd_usb2=devnum=2; run usb_boot
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bootcmd_usb3=devnum=3; run usb_boot
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bootdelay=2
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bootfstype=fat
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bootm_low=0
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bootm_size=0x80000000
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distro_bootcmd=scsi_need_init=; for target in ${boot_targets}; do run bootcmd_${target}; done
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efi_dtb_prefixes=/ /dtb/ /dtb/current/
|
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fdt_addr_r=0x40000000
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fdt_high=0x10000000
|
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fileaddr=0x18000000
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initrd_high=0x79000000
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kernel_addr_r=0x18000000
|
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load_efi_dtb=load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} ${prefix}${efi_fdtfile}
|
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mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi
|
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pxefile_addr_r=0x10000000
|
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ramdisk_addr_r=0x02100000
|
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scan_dev_for_boot=echo Scanning ${devtype} ${devnum}:${distro_bootpart}...; for prefix in ${boot_prefixes}; do run scan_dev_for_extlinux; run scan_dev_for_scripts; done;run scan_dev_for_efi;
|
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scan_dev_for_boot_part=part list ${devtype} ${devnum} -bootable devplist; env exists devplist || setenv devplist 1; for distro_bootpart in ${devplist}; do if fstype ${devtype} ${devnum}:${distro_bootpart} bootfstype; then run scan_dev_for_boot; fi; done; setenv devplist
|
||||
scan_dev_for_efi=setenv efi_fdtfile ${fdtfile}; for prefix in ${efi_dtb_prefixes}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${efi_fdtfile}; then run load_efi_dtb; fi;done;if test -e ${devtype} ${devnum}:${distro_bootpart} efi/boot/bootaa64.efi; then echo Found EFI removable media binary efi/boot/bootaa64.efi; run boot_efi_binary; echo EFI LOAD FAILED: continuing...; fi; setenv efi_fdtfile
|
||||
scan_dev_for_extlinux=if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${boot_syslinux_conf}; then echo Found ${prefix}${boot_syslinux_conf}; run boot_extlinux; echo SCRIPT FAILED: continuing...; fi
|
||||
scan_dev_for_scripts=for script in ${boot_scripts}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${script}; then echo Found U-Boot script ${prefix}${script}; run boot_a_script; echo SCRIPT FAILED: continuing...; fi; done
|
||||
script_offset_f=0x3e80000
|
||||
script_size_f=0x80000
|
||||
scriptaddr=0x20000000
|
||||
usb_boot=usb start; if usb dev ${devnum}; then devtype=usb; run scan_dev_for_boot_part; fi
|
||||
preboot=setenv boot_targets; setenv modeboot; run board_setup
|
||||
|
||||
# SOM specific boot methods
|
||||
som_cc_boot=if test ${card1_name} = SCK-KV-G; then setenv boot_targets mmc1 usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; elif test ${card1_name} = SCK-KR-G; then setenv boot_targets usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; else test ${card1_name} = SCK-KD-G; setenv boot_targets usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; fi;"
|
||||
som_mmc_boot=setenv boot_targets mmc0 && run distro_bootcmd
|
||||
|
||||
k26_starter=SMK-K26-XCL2G
|
||||
k24_starter=SMK-K24-XCL2G
|
||||
bootcmd=setenv model $board_name && if setexpr model gsub .*$k24_starter* $k24_starter || setexpr model gsub .*$k26_starter* $k26_starter; then run som_cc_boot; else run som_mmc_boot; run som_cc_boot; fi
|
||||
|
||||
usb_hub_init=mw 1000 0056 && sleep 1 && i2c write 1000 2d aa 2 -s
|
||||
|
||||
# usb hub init
|
||||
kv260_setup=i2c dev 1 && run usb_hub_init
|
||||
# usb hub init
|
||||
kr260_setup=i2c dev 1 && run usb_hub_init; i2c dev 2 && run usb_hub_init;
|
||||
# usb hub init with enabling PM nodes for ...
|
||||
kd240_setup=i2c dev 0 && run usb_hub_init;zynqmp pmufw node 33; zynqmp pmufw node 47
|
||||
|
||||
board_setup=\
|
||||
if test ${card1_name} = SCK-KV-G; then run kv260_setup; fi;\
|
||||
if test ${card1_name} = SCK-KR-G; then run kr260_setup; fi;\
|
||||
if test ${card1_name} = SCK-KD-G; then run kd240_setup; fi;
|
||||
|
|
@ -42,7 +42,6 @@ CONFIG_SYS_PBSIZE=2075
|
|||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_SYS_BOOTM_LEN=0x3c00000
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_DM is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_FPGA_LOADBP=y
|
||||
CONFIG_CMD_FPGA_LOADFS=y
|
||||
|
|
@ -50,6 +49,7 @@ CONFIG_CMD_FPGA_LOADMK=y
|
|||
CONFIG_CMD_FPGA_LOADP=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_NAND_LOCK_UNLOCK=y
|
||||
CONFIG_CMD_PART=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
|
|
@ -60,11 +60,15 @@ CONFIG_CMD_MII=y
|
|||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_PXE=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_EFIDEBUG=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_CMD_MTDPARTS=y
|
||||
CONFIG_CMD_MTDPARTS_SPREAD=y
|
||||
CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_FAT=y
|
||||
CONFIG_ENV_IS_IN_NAND=y
|
||||
|
|
@ -74,6 +78,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
|
|||
CONFIG_BOOTP_SERVERIP=y
|
||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_DFU_TIMEOUT=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_FPGA_XILINX=y
|
||||
CONFIG_FPGA_ZYNQPL=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
|
|
@ -93,4 +99,6 @@ CONFIG_ZYNQ_SERIAL=y
|
|||
CONFIG_WDT=y
|
||||
CONFIG_WDT_CDNS=y
|
||||
CONFIG_SYS_TIMER_COUNTS_DOWN=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
|
||||
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
|
||||
CONFIG_TOOLS_MKEFICAPSULE=y
|
||||
|
|
|
|||
227
configs/xilinx_zynqmp_kria_defconfig
Normal file
227
configs/xilinx_zynqmp_kria_defconfig
Normal file
|
|
@ -0,0 +1,227 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_POSITION_INDEPENDENT=y
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_TEXT_BASE=0x8000000
|
||||
CONFIG_SYS_MALLOC_LEN=0x4040000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_ENV_SOURCE_FILE="zynqmp_kria"
|
||||
CONFIG_SF_DEFAULT_SPEED=30000000
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0x2200000
|
||||
CONFIG_ENV_SECT_SIZE=0x20000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-smk-k26-revA"
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x18000000
|
||||
CONFIG_SPL_STACK=0xfffffffc
|
||||
CONFIG_SPL_SIZE_LIMIT=0x2a000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_ENV_OFFSET_REDUND=0x2220000
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI=y
|
||||
CONFIG_CMD_FRU=y
|
||||
CONFIG_SYS_LOAD_ADDR=0x8000000
|
||||
CONFIG_ENV_ADDR=0x2200000
|
||||
CONFIG_AHCI=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00000000
|
||||
CONFIG_SYS_MEMTEST_END=0x00001000
|
||||
CONFIG_REMAKE_ELF=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
|
||||
CONFIG_USE_PREBOOT=y
|
||||
CONFIG_BOARD_EARLY_INIT_R=y
|
||||
CONFIG_CLOCKS=y
|
||||
CONFIG_SPL_MAX_SIZE=0x40000
|
||||
CONFIG_SPL_BSS_MAX_SIZE=0x80000
|
||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_FS_LOAD_KERNEL_NAME=""
|
||||
CONFIG_SPL_FS_LOAD_ARGS_NAME=""
|
||||
CONFIG_SPL_FPGA=y
|
||||
CONFIG_SPL_OS_BOOT=y
|
||||
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x8000000
|
||||
CONFIG_SPL_RAM_SUPPORT=y
|
||||
CONFIG_SPL_RAM_DEVICE=y
|
||||
CONFIG_SPL_SPI_LOAD=y
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
|
||||
CONFIG_SPL_ATF=y
|
||||
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
||||
CONFIG_SYS_MAXARGS=64
|
||||
CONFIG_SYS_PBSIZE=2073
|
||||
CONFIG_SYS_BOOTM_LEN=0x6400000
|
||||
CONFIG_CMD_BOOTMENU=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_CMD_NVEDIT_EFI=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_SYS_ALT_MEMTEST=y
|
||||
CONFIG_CMD_SHA1SUM=y
|
||||
CONFIG_CMD_CLK=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_FPGA_LOADBP=y
|
||||
CONFIG_CMD_FPGA_LOADP=y
|
||||
CONFIG_CMD_FPGA_LOAD_SECURE=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_PWM=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_POWEROFF=y
|
||||
CONFIG_CMD_SDRAM=y
|
||||
CONFIG_CMD_SF_TEST=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
CONFIG_BOOTP_MAY_FAIL=y
|
||||
CONFIG_BOOTP_BOOTFILESIZE=y
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_EFIDEBUG=y
|
||||
CONFIG_CMD_RTC=y
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_GETTIME=y
|
||||
CONFIG_CMD_RNG=y
|
||||
CONFIG_CMD_KASLRSEED=y
|
||||
CONFIG_CMD_TIMER=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_CMD_SMC=y
|
||||
CONFIG_CMD_TPM=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_SQUASHFS=y
|
||||
CONFIG_CMD_MTDPARTS=y
|
||||
CONFIG_CMD_MTDPARTS_SPREAD=y
|
||||
CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
|
||||
CONFIG_CMD_UBI=y
|
||||
CONFIG_PARTITION_TYPE_GUID=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_BOARD=y
|
||||
CONFIG_OF_LIST=""
|
||||
CONFIG_DTB_RESELECT=y
|
||||
CONFIG_MULTI_DTB_FIT=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent interrupts iommus power-domains"
|
||||
CONFIG_ENV_IS_NOWHERE=y
|
||||
CONFIG_ENV_IS_IN_FAT=y
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_ENV_FAT_DEVICE_AND_PART=":auto"
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_NETCONSOLE=y
|
||||
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
|
||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
CONFIG_SATA=y
|
||||
CONFIG_SCSI_AHCI=y
|
||||
CONFIG_SATA_CEVA=y
|
||||
CONFIG_BUTTON=y
|
||||
CONFIG_BUTTON_GPIO=y
|
||||
CONFIG_CLK_ZYNQMP=y
|
||||
CONFIG_DFU_TFTP=y
|
||||
CONFIG_DFU_TIMEOUT=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_DFU_MTD=y
|
||||
CONFIG_DFU_RAM=y
|
||||
CONFIG_DFU_SF=y
|
||||
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1800000
|
||||
CONFIG_DMA=y
|
||||
CONFIG_XILINX_DPDMA=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_FPGA_XILINX=y
|
||||
CONFIG_FPGA_ZYNQMPPL=y
|
||||
CONFIG_GPIO_HOG=y
|
||||
CONFIG_XILINX_GPIO=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_SLG7XL45106_I2C_GPO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_CADENCE=y
|
||||
CONFIG_I2C_MUX=y
|
||||
CONFIG_I2C_MUX_PCA954x=y
|
||||
CONFIG_LED=y
|
||||
CONFIG_LED_GPIO=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_I2C_EEPROM=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_MMC_IO_VOLTAGE=y
|
||||
CONFIG_MMC_UHS_SUPPORT=y
|
||||
CONFIG_MMC_HS200_SUPPORT=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_ZYNQ=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_DM_MTD=y
|
||||
CONFIG_SPI_FLASH_BAR=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_ADIN=y
|
||||
CONFIG_PHY_TI_DP83867=y
|
||||
CONFIG_PHY_XILINX_GMII2RGMII=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_XILINX_AXIEMAC=y
|
||||
CONFIG_ZYNQ_GEM=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_PHY_XILINX_ZYNQMP=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCONF=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_ZYNQMP_POWER_DOMAIN=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_PWM=y
|
||||
CONFIG_PWM_CADENCE_TTC=y
|
||||
CONFIG_RESET_ZYNQMP=y
|
||||
CONFIG_DM_RTC=y
|
||||
CONFIG_RTC_EMULATION=y
|
||||
CONFIG_RTC_ZYNQMP=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_ARM_DCC=y
|
||||
CONFIG_XILINX_UARTLITE=y
|
||||
CONFIG_ZYNQ_SERIAL=y
|
||||
CONFIG_SOC_XILINX_ZYNQMP=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_ZYNQ_SPI=y
|
||||
CONFIG_ZYNQMP_GQSPI=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SYSRESET_CMD_POWEROFF=y
|
||||
CONFIG_SYSRESET_PSCI=y
|
||||
CONFIG_TPM2_TIS_SPI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_GENERIC=y
|
||||
CONFIG_USB_ULPI_VIEWPORT=y
|
||||
CONFIG_USB_ULPI=y
|
||||
CONFIG_USB_HOST_ETHER=y
|
||||
CONFIG_USB_ETHER_ASIX=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
|
||||
CONFIG_USB_ETHER=y
|
||||
CONFIG_USB_ETH_CDC=y
|
||||
CONFIG_VIDEO=y
|
||||
# CONFIG_VIDEO_LOGO is not set
|
||||
CONFIG_VIDEO_COPY=y
|
||||
CONFIG_I2C_EDID=y
|
||||
CONFIG_VIDEO_ZYNQMP_DPSUB=y
|
||||
CONFIG_VIRTIO_MMIO=y
|
||||
CONFIG_VIRTIO_NET=y
|
||||
CONFIG_VIRTIO_BLK=y
|
||||
CONFIG_PANIC_HANG=y
|
||||
CONFIG_TPM=y
|
||||
CONFIG_SPL_GZIP=y
|
||||
CONFIG_EFI_SET_TIME=y
|
||||
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
|
||||
CONFIG_EFI_CAPSULE_ON_DISK=y
|
||||
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
|
||||
|
|
@ -844,6 +844,7 @@ static int zynqmp_clk_enable(struct clk *clk)
|
|||
break;
|
||||
case qspi_ref ... can1_ref:
|
||||
case lpd_lsbus:
|
||||
case topsw_lsbus:
|
||||
clkact_shift = 24;
|
||||
mask = 0x1;
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@
|
|||
#include <common.h>
|
||||
#include <cpu_func.h>
|
||||
#include <dm.h>
|
||||
#include <dm/device_compat.h>
|
||||
#include <dm/lists.h>
|
||||
#include <log.h>
|
||||
#include <zynqmp_firmware.h>
|
||||
|
|
@ -290,10 +291,31 @@ int zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size)
|
|||
|
||||
static int zynqmp_power_probe(struct udevice *dev)
|
||||
{
|
||||
struct udevice *ipi_dev;
|
||||
ofnode ipi_node;
|
||||
int ret;
|
||||
|
||||
debug("%s, (dev=%p)\n", __func__, dev);
|
||||
|
||||
/*
|
||||
* Probe all IPI parent node driver. It is important to have IPI
|
||||
* devices available when requested by mbox_get_by* API.
|
||||
* If IPI device isn't available, then mailbox request fails and
|
||||
* that causes system boot failure.
|
||||
* To avoid this make sure all IPI parent drivers are probed here,
|
||||
* and IPI parent driver binds each child node to mailbox driver.
|
||||
* This way mbox_get_by_* API will have correct mailbox device
|
||||
* driver probed.
|
||||
*/
|
||||
ofnode_for_each_compatible_node(ipi_node, "xlnx,zynqmp-ipi-mailbox") {
|
||||
ret = uclass_get_device_by_ofnode(UCLASS_NOP, ipi_node, &ipi_dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to get IPI device from node %s\n",
|
||||
ofnode_get_name(ipi_node));
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
ret = mbox_get_by_name(dev, "tx", &zynqmp_power.tx_chan);
|
||||
if (ret) {
|
||||
debug("%s: Cannot find tx mailbox\n", __func__);
|
||||
|
|
|
|||
|
|
@ -8,9 +8,13 @@
|
|||
#include <common.h>
|
||||
#include <log.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/system.h>
|
||||
#include <dm.h>
|
||||
#include <mailbox-uclass.h>
|
||||
#include <dm/device_compat.h>
|
||||
#include <dm/lists.h>
|
||||
#include <dm/of_access.h>
|
||||
#include <linux/arm-smccc.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/io.h>
|
||||
#include <wait_bit.h>
|
||||
|
|
@ -21,6 +25,43 @@
|
|||
#define IPI_BIT_MASK_PMU0 0x10000
|
||||
#define IPI_INT_REG_BASE_APU 0xFF300000
|
||||
|
||||
/* IPI agent ID any */
|
||||
#define IPI_ID_ANY 0xFFUL
|
||||
|
||||
/* indicate if ZynqMP IPI mailbox driver uses SMC calls or HVC calls */
|
||||
#define USE_SMC 0
|
||||
|
||||
/* Default IPI SMC function IDs */
|
||||
#define SMC_IPI_MAILBOX_OPEN 0x82001000U
|
||||
#define SMC_IPI_MAILBOX_RELEASE 0x82001001U
|
||||
#define SMC_IPI_MAILBOX_STATUS_ENQUIRY 0x82001002U
|
||||
#define SMC_IPI_MAILBOX_NOTIFY 0x82001003U
|
||||
#define SMC_IPI_MAILBOX_ACK 0x82001004U
|
||||
#define SMC_IPI_MAILBOX_ENABLE_IRQ 0x82001005U
|
||||
#define SMC_IPI_MAILBOX_DISABLE_IRQ 0x82001006U
|
||||
|
||||
/* IPI SMC Macros */
|
||||
|
||||
/*
|
||||
* Flag to indicate if notification interrupt
|
||||
* to be disabled.
|
||||
*/
|
||||
#define IPI_SMC_ENQUIRY_DIRQ_MASK BIT(0)
|
||||
|
||||
/*
|
||||
* Flag to indicate if notification interrupt
|
||||
* to be enabled.
|
||||
*/
|
||||
#define IPI_SMC_ACK_EIRQ_MASK BIT(0)
|
||||
|
||||
/* IPI mailbox status */
|
||||
#define IPI_MB_STATUS_IDLE 0
|
||||
#define IPI_MB_STATUS_SEND_PENDING 1
|
||||
#define IPI_MB_STATUS_RECV_PENDING 2
|
||||
|
||||
#define IPI_MB_CHNL_TX 0 /* IPI mailbox TX channel */
|
||||
#define IPI_MB_CHNL_RX 1 /* IPI mailbox RX channel */
|
||||
|
||||
struct ipi_int_regs {
|
||||
u32 trig; /* 0x0 */
|
||||
u32 obs; /* 0x4 */
|
||||
|
|
@ -39,8 +80,24 @@ struct zynqmp_ipi {
|
|||
void __iomem *local_res_regs;
|
||||
void __iomem *remote_req_regs;
|
||||
void __iomem *remote_res_regs;
|
||||
u32 remote_id;
|
||||
u32 local_id;
|
||||
bool el3_supported;
|
||||
};
|
||||
|
||||
static int zynqmp_ipi_fw_call(struct zynqmp_ipi *ipi_mbox,
|
||||
unsigned long a0, unsigned long a3)
|
||||
{
|
||||
struct arm_smccc_res res = {0};
|
||||
unsigned long a1, a2;
|
||||
|
||||
a1 = ipi_mbox->local_id;
|
||||
a2 = ipi_mbox->remote_id;
|
||||
arm_smccc_smc(a0, a1, a2, a3, 0, 0, 0, 0, &res);
|
||||
|
||||
return (int)res.a0;
|
||||
}
|
||||
|
||||
static int zynqmp_ipi_send(struct mbox_chan *chan, const void *data)
|
||||
{
|
||||
const struct zynqmp_ipi_msg *msg = (struct zynqmp_ipi_msg *)data;
|
||||
|
|
@ -51,6 +108,21 @@ static int zynqmp_ipi_send(struct mbox_chan *chan, const void *data)
|
|||
for (size_t i = 0; i < msg->len; i++)
|
||||
writel(msg->buf[i], &mbx[i]);
|
||||
|
||||
/* Use SMC calls for Exception Level less than 3 where TF-A is available */
|
||||
if (!IS_ENABLED(CONFIG_SPL_BUILD) && current_el() < 3) {
|
||||
ret = zynqmp_ipi_fw_call(zynqmp, SMC_IPI_MAILBOX_NOTIFY, 0);
|
||||
|
||||
debug("%s, send %ld bytes\n", __func__, msg->len);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Return if EL3 is not supported */
|
||||
if (!zynqmp->el3_supported) {
|
||||
dev_err(chan->dev, "mailbox in EL3 only supported for zynqmp");
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
/* Write trigger interrupt */
|
||||
writel(IPI_BIT_MASK_PMU0, &ipi_int_apu->trig);
|
||||
|
||||
|
|
@ -67,29 +139,50 @@ static int zynqmp_ipi_recv(struct mbox_chan *chan, void *data)
|
|||
struct zynqmp_ipi_msg *msg = (struct zynqmp_ipi_msg *)data;
|
||||
struct zynqmp_ipi *zynqmp = dev_get_priv(chan->dev);
|
||||
u32 *mbx = (u32 *)zynqmp->local_res_regs;
|
||||
int ret = 0;
|
||||
|
||||
/*
|
||||
* PMU Firmware does not trigger IPI interrupt for API call responses so
|
||||
* there is no need to check ISR flags
|
||||
* there is no need to check ISR flags for EL3.
|
||||
*/
|
||||
for (size_t i = 0; i < msg->len; i++)
|
||||
msg->buf[i] = readl(&mbx[i]);
|
||||
|
||||
/* Ack to remote if EL is not 3 */
|
||||
if (!IS_ENABLED(CONFIG_SPL_BUILD) && current_el() < 3) {
|
||||
ret = zynqmp_ipi_fw_call(zynqmp, SMC_IPI_MAILBOX_ACK,
|
||||
IPI_SMC_ACK_EIRQ_MASK);
|
||||
}
|
||||
|
||||
debug("%s, recv %ld bytes\n", __func__, msg->len);
|
||||
return 0;
|
||||
return ret;
|
||||
};
|
||||
|
||||
static int zynqmp_ipi_probe(struct udevice *dev)
|
||||
static int zynqmp_ipi_dest_probe(struct udevice *dev)
|
||||
{
|
||||
struct zynqmp_ipi *zynqmp = dev_get_priv(dev);
|
||||
struct resource res;
|
||||
ofnode node;
|
||||
int ret;
|
||||
|
||||
debug("%s(dev=%p)\n", __func__, dev);
|
||||
|
||||
/* Get subnode where the regs are defined */
|
||||
/* Note IPI mailbox node needs to be the first one in DT */
|
||||
node = ofnode_first_subnode(dev_ofnode(dev));
|
||||
node = dev_ofnode(dev);
|
||||
|
||||
if (IS_ENABLED(CONFIG_SPL_BUILD) || of_machine_is_compatible("xlnx,zynqmp"))
|
||||
zynqmp->el3_supported = true;
|
||||
|
||||
ret = dev_read_u32(dev->parent, "xlnx,ipi-id", &zynqmp->local_id);
|
||||
if (ret) {
|
||||
dev_err(dev, "can't get local ipi id\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ofnode_read_u32(node, "xlnx,ipi-id", &zynqmp->remote_id);
|
||||
if (ret) {
|
||||
dev_err(dev, "can't get remote ipi id\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (ofnode_read_resource_byname(node, "local_request_region", &res)) {
|
||||
dev_err(dev, "No reg property for local_request_region\n");
|
||||
|
|
@ -97,6 +190,8 @@ static int zynqmp_ipi_probe(struct udevice *dev)
|
|||
};
|
||||
zynqmp->local_req_regs = devm_ioremap(dev, res.start,
|
||||
(res.start - res.end));
|
||||
if (!zynqmp->local_req_regs)
|
||||
return -EINVAL;
|
||||
|
||||
if (ofnode_read_resource_byname(node, "local_response_region", &res)) {
|
||||
dev_err(dev, "No reg property for local_response_region\n");
|
||||
|
|
@ -104,6 +199,8 @@ static int zynqmp_ipi_probe(struct udevice *dev)
|
|||
};
|
||||
zynqmp->local_res_regs = devm_ioremap(dev, res.start,
|
||||
(res.start - res.end));
|
||||
if (!zynqmp->local_res_regs)
|
||||
return -EINVAL;
|
||||
|
||||
if (ofnode_read_resource_byname(node, "remote_request_region", &res)) {
|
||||
dev_err(dev, "No reg property for remote_request_region\n");
|
||||
|
|
@ -111,6 +208,8 @@ static int zynqmp_ipi_probe(struct udevice *dev)
|
|||
};
|
||||
zynqmp->remote_req_regs = devm_ioremap(dev, res.start,
|
||||
(res.start - res.end));
|
||||
if (!zynqmp->remote_req_regs)
|
||||
return -EINVAL;
|
||||
|
||||
if (ofnode_read_resource_byname(node, "remote_response_region", &res)) {
|
||||
dev_err(dev, "No reg property for remote_response_region\n");
|
||||
|
|
@ -118,25 +217,59 @@ static int zynqmp_ipi_probe(struct udevice *dev)
|
|||
};
|
||||
zynqmp->remote_res_regs = devm_ioremap(dev, res.start,
|
||||
(res.start - res.end));
|
||||
if (!zynqmp->remote_res_regs)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
};
|
||||
|
||||
static int zynqmp_ipi_probe(struct udevice *dev)
|
||||
{
|
||||
struct udevice *cdev;
|
||||
ofnode cnode;
|
||||
int ret;
|
||||
|
||||
debug("%s(dev=%p)\n", __func__, dev);
|
||||
|
||||
dev_for_each_subnode(cnode, dev) {
|
||||
ret = device_bind_driver_to_node(dev, "zynqmp_ipi_dest",
|
||||
ofnode_get_name(cnode),
|
||||
cnode, &cdev);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
};
|
||||
|
||||
struct mbox_ops zynqmp_ipi_dest_mbox_ops = {
|
||||
.send = zynqmp_ipi_send,
|
||||
.recv = zynqmp_ipi_recv,
|
||||
};
|
||||
|
||||
static const struct udevice_id zynqmp_ipi_dest_ids[] = {
|
||||
{ .compatible = "xlnx,zynqmp-ipi-dest-mailbox" },
|
||||
{ }
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(zynqmp_ipi_dest) = {
|
||||
.name = "zynqmp_ipi_dest",
|
||||
.id = UCLASS_MAILBOX,
|
||||
.of_match = zynqmp_ipi_dest_ids,
|
||||
.probe = zynqmp_ipi_dest_probe,
|
||||
.priv_auto = sizeof(struct zynqmp_ipi),
|
||||
.ops = &zynqmp_ipi_dest_mbox_ops,
|
||||
};
|
||||
|
||||
static const struct udevice_id zynqmp_ipi_ids[] = {
|
||||
{ .compatible = "xlnx,zynqmp-ipi-mailbox" },
|
||||
{ }
|
||||
};
|
||||
|
||||
struct mbox_ops zynqmp_ipi_mbox_ops = {
|
||||
.send = zynqmp_ipi_send,
|
||||
.recv = zynqmp_ipi_recv,
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(zynqmp_ipi) = {
|
||||
.name = "zynqmp_ipi",
|
||||
.id = UCLASS_MAILBOX,
|
||||
.id = UCLASS_NOP,
|
||||
.of_match = zynqmp_ipi_ids,
|
||||
.probe = zynqmp_ipi_probe,
|
||||
.priv_auto = sizeof(struct zynqmp_ipi),
|
||||
.ops = &zynqmp_ipi_mbox_ops,
|
||||
.flags = DM_FLAG_PROBE_AFTER_BIND,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -903,12 +903,11 @@ static int axi_emac_of_to_plat(struct udevice *dev)
|
|||
|
||||
ret = dev_read_phandle_with_args(dev, "axistream-connected", NULL, 0, 0,
|
||||
&axistream_node);
|
||||
if (ret) {
|
||||
printf("%s: axistream is not found\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
if (!ret)
|
||||
plat->dmatx = (struct axidma_reg *)ofnode_get_addr(axistream_node.node);
|
||||
else
|
||||
plat->dmatx = (struct axidma_reg *)dev_read_addr_index(dev, 1);
|
||||
|
||||
plat->dmatx = (struct axidma_reg *)ofnode_get_addr(axistream_node.node);
|
||||
if (!plat->dmatx) {
|
||||
printf("%s: axi_dma register space not found\n", __func__);
|
||||
return -EINVAL;
|
||||
|
|
|
|||
|
|
@ -8,11 +8,10 @@
|
|||
#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <pci.h>
|
||||
#include <asm/global_data.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/printk.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
/**
|
||||
* struct xilinx_pcie - Xilinx PCIe controller state
|
||||
|
|
@ -25,6 +24,8 @@ struct xilinx_pcie {
|
|||
/* Register definitions */
|
||||
#define XILINX_PCIE_REG_PSCR 0x144
|
||||
#define XILINX_PCIE_REG_PSCR_LNKUP BIT(11)
|
||||
#define XILINX_PCIE_REG_RPSC 0x148
|
||||
#define XILINX_PCIE_REG_RPSC_BEN BIT(0)
|
||||
|
||||
/**
|
||||
* pcie_xilinx_link_up() - Check whether the PCIe link is up
|
||||
|
|
@ -140,20 +141,22 @@ static int pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf,
|
|||
static int pcie_xilinx_of_to_plat(struct udevice *dev)
|
||||
{
|
||||
struct xilinx_pcie *pcie = dev_get_priv(dev);
|
||||
struct fdt_resource reg_res;
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
int err;
|
||||
fdt_addr_t addr;
|
||||
fdt_size_t size;
|
||||
u32 rpsc;
|
||||
|
||||
err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg",
|
||||
0, ®_res);
|
||||
if (err < 0) {
|
||||
pr_err("\"reg\" resource not found\n");
|
||||
return err;
|
||||
}
|
||||
addr = dev_read_addr_size(dev, &size);
|
||||
if (addr == FDT_ADDR_T_NONE)
|
||||
return -EINVAL;
|
||||
|
||||
pcie->cfg_base = map_physmem(reg_res.start,
|
||||
fdt_resource_size(®_res),
|
||||
MAP_NOCACHE);
|
||||
pcie->cfg_base = devm_ioremap(dev, addr, size);
|
||||
if (IS_ERR(pcie->cfg_base))
|
||||
return PTR_ERR(pcie->cfg_base);
|
||||
|
||||
/* Enable the Bridge enable bit */
|
||||
rpsc = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_RPSC);
|
||||
rpsc |= XILINX_PCIE_REG_RPSC_BEN;
|
||||
__raw_writel(rpsc, pcie->cfg_base + XILINX_PCIE_REG_RPSC);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -67,7 +67,7 @@
|
|||
/* SPI Slave Select Register (spissr), [1] p13, [2] p13 */
|
||||
#define SPISSR_MASK(cs) (1 << (cs))
|
||||
#define SPISSR_ACT(cs) ~SPISSR_MASK(cs)
|
||||
#define SPISSR_OFF ~0UL
|
||||
#define SPISSR_OFF (~0U)
|
||||
|
||||
/* SPI Software Reset Register (ssr) */
|
||||
#define SPISSR_RESET_VALUE 0x0a
|
||||
|
|
@ -109,6 +109,27 @@ struct xilinx_spi_priv {
|
|||
u8 startup;
|
||||
};
|
||||
|
||||
static int xilinx_spi_find_buffer_size(struct xilinx_spi_regs *regs)
|
||||
{
|
||||
u8 sr;
|
||||
int n_words = 0;
|
||||
|
||||
/*
|
||||
* Before the buffer_size detection reset the core
|
||||
* to make sure to start with a clean state.
|
||||
*/
|
||||
writel(SPISSR_RESET_VALUE, ®s->srr);
|
||||
|
||||
/* Fill the Tx FIFO with as many words as possible */
|
||||
do {
|
||||
writel(0, ®s->spidtr);
|
||||
sr = readl(®s->spisr);
|
||||
n_words++;
|
||||
} while (!(sr & SPISR_TX_FULL));
|
||||
|
||||
return n_words;
|
||||
}
|
||||
|
||||
static int xilinx_spi_probe(struct udevice *bus)
|
||||
{
|
||||
struct xilinx_spi_priv *priv = dev_get_priv(bus);
|
||||
|
|
@ -116,6 +137,8 @@ static int xilinx_spi_probe(struct udevice *bus)
|
|||
|
||||
regs = priv->regs = dev_read_addr_ptr(bus);
|
||||
priv->fifo_depth = dev_read_u32_default(bus, "fifo-size", 0);
|
||||
if (!priv->fifo_depth)
|
||||
priv->fifo_depth = xilinx_spi_find_buffer_size(regs);
|
||||
|
||||
writel(SPISSR_RESET_VALUE, ®s->srr);
|
||||
|
||||
|
|
@ -217,9 +240,9 @@ static u32 xilinx_spi_read_rxfifo(struct udevice *bus, u8 *rxp, u32 rxbytes)
|
|||
return i;
|
||||
}
|
||||
|
||||
static int start_transfer(struct spi_slave *spi, const void *dout, void *din, u32 len)
|
||||
static int start_transfer(struct udevice *dev, const void *dout, void *din, u32 len)
|
||||
{
|
||||
struct udevice *bus = spi->dev->parent;
|
||||
struct udevice *bus = dev->parent;
|
||||
struct xilinx_spi_priv *priv = dev_get_priv(bus);
|
||||
struct xilinx_spi_regs *regs = priv->regs;
|
||||
u32 count, txbytes, rxbytes;
|
||||
|
|
@ -259,10 +282,9 @@ static int start_transfer(struct spi_slave *spi, const void *dout, void *din, u3
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void xilinx_spi_startup_block(struct spi_slave *spi)
|
||||
static void xilinx_spi_startup_block(struct udevice *dev)
|
||||
{
|
||||
struct dm_spi_slave_plat *slave_plat =
|
||||
dev_get_parent_plat(spi->dev);
|
||||
struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
|
||||
unsigned char txp;
|
||||
unsigned char rxp[8];
|
||||
|
||||
|
|
@ -270,13 +292,25 @@ static void xilinx_spi_startup_block(struct spi_slave *spi)
|
|||
* Perform a dummy read as a work around for
|
||||
* the startup block issue.
|
||||
*/
|
||||
spi_cs_activate(spi->dev, slave_plat->cs);
|
||||
spi_cs_activate(dev, slave_plat->cs);
|
||||
txp = 0x9f;
|
||||
start_transfer(spi, (void *)&txp, NULL, 1);
|
||||
start_transfer(dev, (void *)&txp, NULL, 1);
|
||||
|
||||
start_transfer(spi, NULL, (void *)rxp, 6);
|
||||
start_transfer(dev, NULL, (void *)rxp, 6);
|
||||
|
||||
spi_cs_deactivate(spi->dev);
|
||||
spi_cs_deactivate(dev);
|
||||
}
|
||||
|
||||
static int xilinx_spi_xfer(struct udevice *dev, unsigned int bitlen,
|
||||
const void *dout, void *din, unsigned long flags)
|
||||
{
|
||||
struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
|
||||
int ret;
|
||||
|
||||
spi_cs_activate(dev, slave_plat->cs);
|
||||
ret = start_transfer(dev, dout, din, bitlen / 8);
|
||||
spi_cs_deactivate(dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int xilinx_spi_mem_exec_op(struct spi_slave *spi,
|
||||
|
|
@ -294,14 +328,15 @@ static int xilinx_spi_mem_exec_op(struct spi_slave *spi,
|
|||
* as QSPI provides command. So first command fails.
|
||||
*/
|
||||
if (!startup) {
|
||||
xilinx_spi_startup_block(spi);
|
||||
xilinx_spi_startup_block(spi->dev);
|
||||
startup++;
|
||||
}
|
||||
|
||||
spi_cs_activate(spi->dev, slave_plat->cs);
|
||||
|
||||
if (op->cmd.opcode) {
|
||||
ret = start_transfer(spi, (void *)&op->cmd.opcode, NULL, 1);
|
||||
ret = start_transfer(spi->dev, (void *)&op->cmd.opcode,
|
||||
NULL, 1);
|
||||
if (ret)
|
||||
goto done;
|
||||
}
|
||||
|
|
@ -313,7 +348,7 @@ static int xilinx_spi_mem_exec_op(struct spi_slave *spi,
|
|||
addr_buf[i] = op->addr.val >>
|
||||
(8 * (op->addr.nbytes - i - 1));
|
||||
|
||||
ret = start_transfer(spi, (void *)addr_buf, NULL,
|
||||
ret = start_transfer(spi->dev, (void *)addr_buf, NULL,
|
||||
op->addr.nbytes);
|
||||
if (ret)
|
||||
goto done;
|
||||
|
|
@ -322,16 +357,16 @@ static int xilinx_spi_mem_exec_op(struct spi_slave *spi,
|
|||
dummy_len = (op->dummy.nbytes * op->data.buswidth) /
|
||||
op->dummy.buswidth;
|
||||
|
||||
ret = start_transfer(spi, NULL, NULL, dummy_len);
|
||||
ret = start_transfer(spi->dev, NULL, NULL, dummy_len);
|
||||
if (ret)
|
||||
goto done;
|
||||
}
|
||||
if (op->data.nbytes) {
|
||||
if (op->data.dir == SPI_MEM_DATA_IN) {
|
||||
ret = start_transfer(spi, NULL,
|
||||
ret = start_transfer(spi->dev, NULL,
|
||||
op->data.buf.in, op->data.nbytes);
|
||||
} else {
|
||||
ret = start_transfer(spi, op->data.buf.out,
|
||||
ret = start_transfer(spi->dev, op->data.buf.out,
|
||||
NULL, op->data.nbytes);
|
||||
}
|
||||
if (ret)
|
||||
|
|
@ -427,6 +462,7 @@ static const struct spi_controller_mem_ops xilinx_spi_mem_ops = {
|
|||
static const struct dm_spi_ops xilinx_spi_ops = {
|
||||
.claim_bus = xilinx_spi_claim_bus,
|
||||
.release_bus = xilinx_spi_release_bus,
|
||||
.xfer = xilinx_spi_xfer,
|
||||
.set_speed = xilinx_spi_set_speed,
|
||||
.set_mode = xilinx_spi_set_mode,
|
||||
.mem_ops = &xilinx_spi_mem_ops,
|
||||
|
|
|
|||
Loading…
Reference in a new issue