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Simon Glass f3998fdc4d env: Rename environment.h to env_internal.h 
This file contains lots of internal details about the environment. Most
code can include env.h instead, calling the functions there as needed.

Rename this file and add a comment at the top to indicate its internal
nature.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Fixup apalis-tk1.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-11 19:27:31 -04:00
..
eth.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig LS1012AFRWY: Add Secure Boot support 2018-06-11 12:34:45 -07:00
ls1012afrdm.c env: Rename environment.h to env_internal.h 2019-08-11 19:27:31 -04:00
MAINTAINERS Add TFA boot flow for some Layerscape platforms 2018-12-10 17:19:59 -05:00
Makefile board: freescale: ls1012afrdm: enable network support on ls1012afrdm 2018-03-22 15:05:29 -05:00
README armv8: ls1012a: Add support of ls1012afrdm board 2016-06-03 14:12:51 -07:00

README 

Overview
--------
QorIQ LS1012A FREEDOM (LS1012AFRDM) is a high-performance development
platform, with a complete debugging environment. The LS1012AFRDM board
supports the QorIQ LS1012A processor and is optimized to support the
high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports.

LS1012A SoC Overview
--------------------
Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A
SoC overview.

 LS1012AFRDM board Overview
 -----------------------
 - SERDES Connections, 2 lanes supportingspeeds upto 1 Gbit/s
     - 2 SGMII 1G PHYs
 - DDR Controller
     - 4 Gb DDR3L SDRAM memory, running at data rates up to 1 GT/s
	operating at 1.35 V
 - QSPI
     - Onboard 512 Mbit QSPI flash memory running at speed up
      to 108/54 MHz
 - One high-speed USB 2.0/3.0 port, one USB 2.0 port
     - USB 2.0/3.0 port is configured as On-The-Go (OTG) with a
       Micro-AB connector.
     - USB 2.0 port is a debug port (CMSIS DAP) and is configured
       as a Micro-AB device.
 - I2C controller
     - One I2C bus with connectivity to Arduino headers
 - UART
     - UART (Console): UART1 (Without flow control) for console
 - ARM JTAG support
     - ARM Cortex® 10-pin JTAG connector for LS1012A
     - CMSIS DAP through K20 microcontroller
 - SAI Audio interface
     - One SAI port, SAI 2 with full duplex support
 - Clocks
     - 25 MHz crystal for LS1012A
     - 8 MHz Crystal for K20
     - 24 MHz for SC16IS740IPW SPI to Dual UART bridge
 - Power Supplies
     - 5 V input supply from USB
     - 0.9 V, 1.35 V, and 1.8 V for VDD/Core, DDR, I/O, and
       other board interfaces

Booting Options
---------------
QSPI Flash 1

QSPI flash map
--------------
Images		| Size	|QSPI Flash Address
------------------------------------------
RCW + PBI	| 1MB	| 0x4000_0000
U-boot 		| 1MB	| 0x4010_0000
U-boot Env 	| 1MB	| 0x4020_0000
PPA FIT image	| 2MB	| 0x4050_0000
Linux ITB	| ~53MB | 0x40A0_0000