mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 22:03:15 +00:00
775011980b
With the correct settings described in the device-tree the PHY settings in the board init are no longer required. The values are taken from the linux device tree. The PHY latency settings are derived from the phy-mode property and the voltage seetings are done via the regulator. Suggested-by: Michael Walle <michael@walle.cc> Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com> Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK Reviewed-by: Fabio Estevam <festevam@gmail.com>
44 lines
737 B
C
44 lines
737 B
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright 2019 NXP
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <env.h>
|
|
#include <init.h>
|
|
#include <asm/global_data.h>
|
|
#include <miiphy.h>
|
|
#include <netdev.h>
|
|
#include <asm/io.h>
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
int board_mmc_get_env_dev(int devno)
|
|
{
|
|
return devno;
|
|
}
|
|
|
|
static void setup_fec(void)
|
|
{
|
|
struct iomuxc_gpr_base_regs *gpr =
|
|
(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
|
|
|
|
/* Use 125M anatop REF_CLK1 for ENET1, not from external */
|
|
clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
|
|
}
|
|
|
|
int board_init(void)
|
|
{
|
|
setup_fec();
|
|
|
|
return 0;
|
|
}
|
|
|
|
int board_late_init(void)
|
|
{
|
|
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
|
env_set("board_name", "DDR4 EVK");
|
|
env_set("board_rev", "iMX8MN");
|
|
#endif
|
|
return 0;
|
|
}
|