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a5ff6f5c72
Previously we do not have proper dual rank memory detection on R40 (because we omitted PIR_QSGATE, which does not work on R40 with our configuration), and dual rank memory is just simply disabled as early R40 boards available (Banana Pi M2 Ultra and Berry) have single rank memory. As a board with dual rank memory (Forlinx OKA40i-C) is now known to us, we need to have a way to do memory rank detection to support that board. Add some routine to detect memory rank by trying to access the memory in rank 1 and check for error status of the memory controller, and then enable dual rank memory on R40. Similar routine can be used to detect half DQ width (which is also detected by PIR_QSGATE on other SoCs), but it's left unimplemented because there's no known R40 board with half DQ width now. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> [Andre: Move R40 detect code call into sunxi_dram_init()] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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| u-boot-elf.lds | ||