u-boot/arch/arm/mach-tegra
Stephen Warren a5fc3d0b35 ARM: tegra: query_sdram_size() cleanup
The return value of query_sdram_size() is assigned directly to
gd->ram_size in dram_init(). Adjust the return type to match the field
it's assigned to. This has the beneficial effect that on 64-bit systems,
the return value can correctly represent large RAM sizes over 4GB.

For similar reasons, change the type of variable size_bytes in the same
way.

query_sdram_size() would previously clip the detected RAM size to at most
just under 4GB in all cases, since on 32-bit systems, larger values could
not be represented. Disable this feature on 64-bit systems since the
representation restriction does not exist.

On 64-bit systems, never call get_ram_size() to validate the detected/
calculated RAM size. On any system with a secure OS/... carve-out, RAM
may not have a single contiguous usable area, and this can confuse
get_ram_size(). Ideally, we'd make this call conditional upon some other
flag that indicates specifically that a carve-out is actually in use. At
present, building for a 64-bit system is the best indication we have of
this fact. In fact, the call to get_ram_size() is not useful by the time
U-Boot runs on any system, since U-Boot (and potentially much other early
boot software) always runs from RAM on Tegra, so any mistakes in memory
controller register programming will already have manifested themselves
and prevented U-Boot from running to this point. In the future, we may
simply delete the call to get_ram_size() in all cases.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-13 13:06:04 -07:00
..
tegra20 Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. 2015-08-05 15:22:51 -07:00
tegra30 Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. 2015-08-05 15:22:51 -07:00
tegra114 Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. 2015-08-05 15:22:51 -07:00
tegra124 tegra: Correct logic for reading pll_misc in clock_start_pll() 2015-08-13 13:06:04 -07:00
tegra210 tegra: Correct logic for reading pll_misc in clock_start_pll() 2015-08-13 13:06:04 -07:00
ap.c ARM: tegra: move VPR configuration to a later stage 2015-08-06 10:50:03 -07:00
board.c ARM: tegra: query_sdram_size() cleanup 2015-08-13 13:06:04 -07:00
board2.c ARM: tegra: move VPR configuration to a later stage 2015-08-06 10:50:03 -07:00
cache.c ARM: Tegra210: Add support to common Tegra source/config files 2015-07-28 10:30:20 -07:00
clock.c tegra: Correct logic for reading pll_misc in clock_start_pll() 2015-08-13 13:06:04 -07:00
cmd_enterrcm.c ARM: tegra: collect SoC sources into mach-tegra 2015-02-21 08:23:51 -05:00
cpu.c Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. 2015-08-05 15:22:51 -07:00
cpu.h ARM: Tegra210: Add support to common Tegra source/config files 2015-07-28 10:30:20 -07:00
emc.c ARM: tegra: move NVIDIA common files to arch/arm/mach-tegra 2015-05-13 09:46:19 -07:00
emc.h ARM: tegra: move NVIDIA common files to arch/arm/mach-tegra 2015-05-13 09:46:19 -07:00
gpu.c ARM: tegra: enable GPU DT node when appropriate 2015-08-06 10:50:03 -07:00
Kconfig ARM: Tegra210: Add support to common Tegra source/config files 2015-07-28 10:30:20 -07:00
lowlevel_init.S ARM: Tegra210: Add support to common Tegra source/config files 2015-07-28 10:30:20 -07:00
Makefile ARM: tegra: move VPR configuration to a later stage 2015-08-06 10:50:03 -07:00
pinmux-common.c ARM: tegra: Build warning fixes for 64-bit 2015-07-27 15:54:18 -07:00
powergate.c tegra: Introduce SRAM repair on tegra124 2015-06-09 09:56:14 -07:00
psci.S tegra: Set CNTFRQ for secondary CPUs 2015-05-13 09:24:16 -07:00
pwm.c tegra: pwm: Allow the clock rate to be left as is 2015-05-13 09:24:07 -07:00
spl.c ARM: tegra: collect SoC sources into mach-tegra 2015-02-21 08:23:51 -05:00
sys_info.c ARM: tegra: collect SoC sources into mach-tegra 2015-02-21 08:23:51 -05:00
xusb-padctl.c ARM: tegra: collect SoC sources into mach-tegra 2015-02-21 08:23:51 -05:00