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00407251c3
Synchronize RZ/G2M SoC DTs with mainline Linux 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
31 lines
910 B
C
31 lines
910 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2019 Renesas Electronics Corp.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A774A1_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A774A1_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*/
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#define R8A774A1_PD_CA57_CPU0 0
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#define R8A774A1_PD_CA57_CPU1 1
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#define R8A774A1_PD_CA53_CPU0 5
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#define R8A774A1_PD_CA53_CPU1 6
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#define R8A774A1_PD_CA53_CPU2 7
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#define R8A774A1_PD_CA53_CPU3 8
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#define R8A774A1_PD_CA57_SCU 12
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#define R8A774A1_PD_A3VC 14
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#define R8A774A1_PD_3DG_A 17
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#define R8A774A1_PD_3DG_B 18
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#define R8A774A1_PD_CA53_SCU 21
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#define R8A774A1_PD_A2VC0 25
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#define R8A774A1_PD_A2VC1 26
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/* Always-on power area */
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#define R8A774A1_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A774A1_SYSC_H__ */
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