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The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC architecture platform, providing ultra-low-power modes, dual display, multi-sensor edge compute, security and other BOM-saving integration. The AM62 SoC targets broad market to enable applications such as Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building Automation, Appliances and more. Some highlights of this SoC are: * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Pin-to-pin compatible options for single and quad core are available. * Cortex-M4F for general-purpose or safety usage. * Dual display support, providing 24-bit RBG parallel interface and OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display resolution. * Selectable GPUsupport, up to 8GFLOPS, providing better user experience in 3D graphic display case and Android. * PRU(Programmable Realtime Unit) support for customized programmable interfaces/IOs. * Integrated Giga-bit Ethernet switch supporting up to a total of two external ports (TSN capable). * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. * Dedicated Centralized System Controller for Security, Power, and Resource Management. * Multiple low power modes support, ex: Deep sleep,Standby, MCU-only, enabling battery powered system design. AM625 is the first device of the family. Add DT bindings for the same. More details can be found in the Technical Reference Manual: https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Gowtham Tammana <g-tammana@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
48 lines
1.3 KiB
C
48 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
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* Suman Anna <s-anna@ti.com>
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*/
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#ifndef _ASM_ARCH_AM62_SPL_H_
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#define _ASM_ARCH_AM62_SPL_H_
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/* Primary BootMode devices */
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#define BOOT_DEVICE_RAM 0x00
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#define BOOT_DEVICE_OSPI 0x01
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#define BOOT_DEVICE_QSPI 0x02
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#define BOOT_DEVICE_SPI 0x03
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#define BOOT_DEVICE_CPGMAC 0x04
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#define BOOT_DEVICE_ETHERNET_RGMII 0x04
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#define BOOT_DEVICE_ETHERNET_RMII 0x05
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#define BOOT_DEVICE_I2C 0x06
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#define BOOT_DEVICE_UART 0x07
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#define BOOT_DEVICE_MMC 0x08
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#define BOOT_DEVICE_EMMC 0x09
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#define BOOT_DEVICE_USB 0x2A
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#define BOOT_DEVICE_DFU 0x0A
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#define BOOT_DEVICE_GPMC_NAND 0x0B
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#define BOOT_DEVICE_GPMC_NOR 0x0C
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#define BOOT_DEVICE_XSPI 0x0E
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#define BOOT_DEVICE_NOBOOT 0x0F
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/* U-Boot used aliases */
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#define BOOT_DEVICE_ETHERNET 0x04
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#define BOOT_DEVICE_MMC2 0x08
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#define BOOT_DEVICE_MMC1 0x09
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/* Invalid */
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#define BOOT_DEVICE_MMC2_2 0x1F
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/* Backup BootMode devices */
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#define BACKUP_BOOT_DEVICE_DFU 0x01
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#define BACKUP_BOOT_DEVICE_UART 0x03
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#define BACKUP_BOOT_DEVICE_ETHERNET 0x04
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#define BACKUP_BOOT_DEVICE_MMC 0x05
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#define BACKUP_BOOT_DEVICE_SPI 0x06
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#define BACKUP_BOOT_DEVICE_I2C 0x07
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#define BACKUP_BOOT_DEVICE_USB 0x09
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#define K3_PRIMARY_BOOTMODE 0x0
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#endif /* _ASM_ARCH_AM62_SPL_H_ */
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