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u-boot/arch/arm/dts/nuvoton-common-npcm7xx.dtsi
Jim Liu 84335544ea arm: nuvoton: Add support for Nuvoton NPCM750 BMC 
Add basic support for the Nuvoton NPCM750 EVB (Poleg).

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-05-05 09:28:47 -04:00

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// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
#include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
/* external reference clock */
clk_refclk: clk_refclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
clock-output-names = "refclk";
};
/* external reference clock for cpu. float in normal operation */
clk_sysbypck: clk_sysbypck {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <800000000>;
clock-output-names = "sysbypck";
};
/* external reference clock for MC. float in normal operation */
clk_mcbypck: clk_mcbypck {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <800000000>;
clock-output-names = "mcbypck";
};
/* external clock signal rg1refck, supplied by the phy */
clk_rg1refck: clk_rg1refck {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
clock-output-names = "clk_rg1refck";
};
/* external clock signal rg2refck, supplied by the phy */
clk_rg2refck: clk_rg2refck {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
clock-output-names = "clk_rg2refck";
};
clk_xin: clk_xin {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "clk_xin";
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gic>;
ranges = <0x0 0xf0000000 0x00900000>;
scu: scu@3fe000 {
compatible = "arm,cortex-a9-scu";
reg = <0x3fe000 0x1000>;
};
l2: cache-controller@3fc000 {
compatible = "arm,pl310-cache";
reg = <0x3fc000 0x1000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
cache-unified;
cache-level = <2>;
clocks = <&clk NPCM7XX_CLK_AXI>;
arm,shared-override;
};
gic: interrupt-controller@3ff000 {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x3ff000 0x1000>,
<0x3fe100 0x100>;
};
gcr: gcr@800000 {
compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
reg = <0x800000 0x1000>;
};
rst: rst@801000 {
compatible = "nuvoton,npcm750-rst", "syscon", "simple-mfd";
reg = <0x801000 0x6C>;
};
};
ahb {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gic>;
ranges;
rstc: rstc@f0801000 {
compatible = "nuvoton,npcm750-reset";
reg = <0xf0801000 0x70>;
#reset-cells = <2>;
};
clk: clock-controller@f0801000 {
compatible = "nuvoton,npcm750-clk", "syscon";
#clock-cells = <1>;
clock-controller;
reg = <0xf0801000 0x1000>;
clock-names = "refclk", "sysbypck", "mcbypck";
clocks = <&clk_refclk>, <&clk_sysbypck>, <&clk_mcbypck>;
};
gmac0: eth@f0802000 {
device_type = "network";
compatible = "nuvoton,npcm-dwmac";
reg = <0xf0802000 0x2000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
ethernet = <0>;
clocks = <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>;
clock-names = "stmmaceth", "clk_gmac";
pinctrl-names = "default";
pinctrl-0 = <&rg1_pins
&rg1mdio_pins>;
status = "disabled";
};
ehci1: usb@f0806000 {
compatible = "nuvoton,npcm750-ehci";
reg = <0xf0806000 0x1000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
fiu0: spi@fb000000 {
compatible = "nuvoton,npcm750-fiu";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfb000000 0x1000>;
reg-names = "control", "memory";
clocks = <&clk NPCM7XX_CLK_SPI0>;
clock-names = "clk_spi0";
status = "disabled";
};
fiu3: spi@c0000000 {
compatible = "nuvoton,npcm750-fiu";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xc0000000 0x1000>;
reg-names = "control", "memory";
clocks = <&clk NPCM7XX_CLK_SPI3>;
clock-names = "clk_spi3";
pinctrl-names = "default";
pinctrl-0 = <&spi3_pins>;
status = "disabled";
};
fiux: spi@fb001000 {
compatible = "nuvoton,npcm750-fiu";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfb001000 0x1000>;
reg-names = "control", "memory";
clocks = <&clk NPCM7XX_CLK_SPIX>;
clock-names = "clk_spix";
status = "disabled";
};
apb {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gic>;
ranges = <0x0 0xf0000000 0x00300000>;
lpc_kcs: lpc_kcs@7000 {
compatible = "nuvoton,npcm750-lpc-kcs", "simple-mfd", "syscon";
reg = <0x7000 0x40>;
reg-io-width = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x7000 0x40>;
kcs1: kcs1@0 {
compatible = "nuvoton,npcm750-kcs-bmc";
reg = <0x0 0x40>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
kcs_chan = <1>;
status = "disabled";
};
kcs2: kcs2@0 {
compatible = "nuvoton,npcm750-kcs-bmc";
reg = <0x0 0x40>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
kcs_chan = <2>;
status = "disabled";
};
kcs3: kcs3@0 {
compatible = "nuvoton,npcm750-kcs-bmc";
reg = <0x0 0x40>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
kcs_chan = <3>;
status = "disabled";
};
};
spi0: spi@200000 {
compatible = "nuvoton,npcm750-pspi";
reg = <0x200000 0x1000>;
pinctrl-names = "default";
pinctrl-0 = <&pspi1_pins>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM7XX_CLK_APB5>;
clock-names = "clk_apb5";
resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>;
status = "disabled";
};
spi1: spi@201000 {
compatible = "nuvoton,npcm750-pspi";
reg = <0x201000 0x1000>;
pinctrl-names = "default";
pinctrl-0 = <&pspi2_pins>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM7XX_CLK_APB5>;
clock-names = "clk_apb5";
resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI2>;
status = "disabled";
};
timer0: timer@8000 {
compatible = "nuvoton,npcm750-timer";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x8000 0x1C>;
clocks = <&clk NPCM7XX_CLK_TIMER>;
};
watchdog0: watchdog@801C {
compatible = "nuvoton,npcm750-wdt";
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x801C 0x4>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_TIMER>;
};
watchdog1: watchdog@901C {
compatible = "nuvoton,npcm750-wdt";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x901C 0x4>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_TIMER>;
};
watchdog2: watchdog@a01C {
compatible = "nuvoton,npcm750-wdt";
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xa01C 0x4>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_TIMER>;
};
serial0: serial@1000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x1000 0x1000>;
clocks = <&clk NPCM7XX_CLK_UART>, <&clk NPCM7XX_CLK_PLL2DIV2>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
};
serial1: serial@2000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x2000 0x1000>;
clocks = <&clk NPCM7XX_CLK_UART>, <&clk NPCM7XX_CLK_PLL2DIV2>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
};
serial2: serial@3000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x3000 0x1000>;
clocks = <&clk NPCM7XX_CLK_UART>, <&clk NPCM7XX_CLK_PLL2DIV2>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
};
serial3: serial@4000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x4000 0x1000>;
clocks = <&clk NPCM7XX_CLK_UART>, <&clk NPCM7XX_CLK_PLL2DIV2>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
};
rng: rng@b000 {
compatible = "nuvoton,npcm750-rng";
reg = <0xb000 0x8>;
status = "disabled";
};
adc: adc@c000 {
compatible = "nuvoton,npcm750-adc";
reg = <0xc000 0x8>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM7XX_CLK_ADC>;
resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>;
status = "disabled";
};
pwm_fan: pwm-fan-controller@103000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nuvoton,npcm750-pwm-fan";
reg = <0x103000 0x2000>, <0x180000 0x8000>;
reg-names = "pwm", "fan";
clocks = <&clk NPCM7XX_CLK_APB3>,
<&clk NPCM7XX_CLK_APB4>;
clock-names = "pwm","fan";
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pins &pwm1_pins
&pwm2_pins &pwm3_pins
&pwm4_pins &pwm5_pins
&pwm6_pins &pwm7_pins
&fanin0_pins &fanin1_pins
&fanin2_pins &fanin3_pins
&fanin4_pins &fanin5_pins
&fanin6_pins &fanin7_pins
&fanin8_pins &fanin9_pins
&fanin10_pins &fanin11_pins
&fanin12_pins &fanin13_pins
&fanin14_pins &fanin15_pins>;
status = "disabled";
};
i2c0: i2c@80000 {
reg = <0x80000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb0_pins>;
status = "disabled";
};
i2c1: i2c@81000 {
reg = <0x81000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb1_pins>;
status = "disabled";
};
i2c2: i2c@82000 {
reg = <0x82000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb2_pins>;
status = "disabled";
};
i2c3: i2c@83000 {
reg = <0x83000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb3_pins>;
status = "disabled";
};
i2c4: i2c@84000 {
reg = <0x84000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb4_pins>;
status = "disabled";
};
i2c5: i2c@85000 {
reg = <0x85000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb5_pins>;
status = "disabled";
};
i2c6: i2c@86000 {
reg = <0x86000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb6_pins>;
status = "disabled";
};
i2c7: i2c@87000 {
reg = <0x87000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb7_pins>;
status = "disabled";
};
i2c8: i2c@88000 {
reg = <0x88000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb8_pins>;
status = "disabled";
};
i2c9: i2c@89000 {
reg = <0x89000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb9_pins>;
status = "disabled";
};
i2c10: i2c@8a000 {
reg = <0x8a000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb10_pins>;
status = "disabled";
};
i2c11: i2c@8b000 {
reg = <0x8b000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb11_pins>;
status = "disabled";
};
i2c12: i2c@8c000 {
reg = <0x8c000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb12_pins>;
status = "disabled";
};
i2c13: i2c@8d000 {
reg = <0x8d000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb13_pins>;
status = "disabled";
};
i2c14: i2c@8e000 {
reg = <0x8e000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb14_pins>;
status = "disabled";
};
i2c15: i2c@8f000 {
reg = <0x8f000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM7XX_CLK_APB2>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb15_pins>;
status = "disabled";
};
};
};
pinctrl: pinctrl@f0800000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "nuvoton,npcm750-pinctrl", "syscon", "simple-mfd";
ranges = <0 0xf0010000 0x8000>;
gpio0: gpio@f0010000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x0 0x80>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 0 32>;
};
gpio1: gpio@f0011000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x1000 0x80>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 32 32>;
};
gpio2: gpio@f0012000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x2000 0x80>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 64 32>;
};
gpio3: gpio@f0013000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x3000 0x80>;
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 96 32>;
};
gpio4: gpio@f0014000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x4000 0x80>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 128 32>;
};
gpio5: gpio@f0015000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x5000 0x80>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 160 32>;
};
gpio6: gpio@f0016000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x6000 0x80>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 192 32>;
};
gpio7: gpio@f0017000 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x7000 0x80>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 224 32>;
};
iox1_pins: iox1-pins {
groups = "iox1";
function = "iox1";
};
iox2_pins: iox2-pins {
groups = "iox2";
function = "iox2";
};
smb1d_pins: smb1d-pins {
groups = "smb1d";
function = "smb1d";
};
smb2d_pins: smb2d-pins {
groups = "smb2d";
function = "smb2d";
};
lkgpo1_pins: lkgpo1-pins {
groups = "lkgpo1";
function = "lkgpo1";
};
lkgpo2_pins: lkgpo2-pins {
groups = "lkgpo2";
function = "lkgpo2";
};
ioxh_pins: ioxh-pins {
groups = "ioxh";
function = "ioxh";
};
gspi_pins: gspi-pins {
groups = "gspi";
function = "gspi";
};
smb5b_pins: smb5b-pins {
groups = "smb5b";
function = "smb5b";
};
smb5c_pins: smb5c-pins {
groups = "smb5c";
function = "smb5c";
};
lkgpo0_pins: lkgpo0-pins {
groups = "lkgpo0";
function = "lkgpo0";
};
pspi2_pins: pspi2-pins {
groups = "pspi2";
function = "pspi2";
};
smb4den_pins: smb4den-pins {
groups = "smb4den";
function = "smb4den";
};
smb4b_pins: smb4b-pins {
groups = "smb4b";
function = "smb4b";
};
smb4c_pins: smb4c-pins {
groups = "smb4c";
function = "smb4c";
};
smb15_pins: smb15-pins {
groups = "smb15";
function = "smb15";
};
smb4d_pins: smb4d-pins {
groups = "smb4d";
function = "smb4d";
};
smb14_pins: smb14-pins {
groups = "smb14";
function = "smb14";
};
smb5_pins: smb5-pins {
groups = "smb5";
function = "smb5";
};
smb4_pins: smb4-pins {
groups = "smb4";
function = "smb4";
};
smb3_pins: smb3-pins {
groups = "smb3";
function = "smb3";
};
spi0cs1_pins: spi0cs1-pins {
groups = "spi0cs1";
function = "spi0cs1";
};
spi0cs2_pins: spi0cs2-pins {
groups = "spi0cs2";
function = "spi0cs2";
};
spi0cs3_pins: spi0cs3-pins {
groups = "spi0cs3";
function = "spi0cs3";
};
smb3c_pins: smb3c-pins {
groups = "smb3c";
function = "smb3c";
};
smb3b_pins: smb3b-pins {
groups = "smb3b";
function = "smb3b";
};
bmcuart0a_pins: bmcuart0a-pins {
groups = "bmcuart0a";
function = "bmcuart0a";
};
uart1_pins: uart1-pins {
groups = "uart1";
function = "uart1";
};
jtag2_pins: jtag2-pins {
groups = "jtag2";
function = "jtag2";
};
bmcuart1_pins: bmcuart1-pins {
groups = "bmcuart1";
function = "bmcuart1";
};
uart2_pins: uart2-pins {
groups = "uart2";
function = "uart2";
};
bmcuart0b_pins: bmcuart0b-pins {
groups = "bmcuart0b";
function = "bmcuart0b";
};
r1err_pins: r1err-pins {
groups = "r1err";
function = "r1err";
};
r1md_pins: r1md-pins {
groups = "r1md";
function = "r1md";
};
smb3d_pins: smb3d-pins {
groups = "smb3d";
function = "smb3d";
};
fanin0_pins: fanin0-pins {
groups = "fanin0";
function = "fanin0";
};
fanin1_pins: fanin1-pins {
groups = "fanin1";
function = "fanin1";
};
fanin2_pins: fanin2-pins {
groups = "fanin2";
function = "fanin2";
};
fanin3_pins: fanin3-pins {
groups = "fanin3";
function = "fanin3";
};
fanin4_pins: fanin4-pins {
groups = "fanin4";
function = "fanin4";
};
fanin5_pins: fanin5-pins {
groups = "fanin5";
function = "fanin5";
};
fanin6_pins: fanin6-pins {
groups = "fanin6";
function = "fanin6";
};
fanin7_pins: fanin7-pins {
groups = "fanin7";
function = "fanin7";
};
fanin8_pins: fanin8-pins {
groups = "fanin8";
function = "fanin8";
};
fanin9_pins: fanin9-pins {
groups = "fanin9";
function = "fanin9";
};
fanin10_pins: fanin10-pins {
groups = "fanin10";
function = "fanin10";
};
fanin11_pins: fanin11-pins {
groups = "fanin11";
function = "fanin11";
};
fanin12_pins: fanin12-pins {
groups = "fanin12";
function = "fanin12";
};
fanin13_pins: fanin13-pins {
groups = "fanin13";
function = "fanin13";
};
fanin14_pins: fanin14-pins {
groups = "fanin14";
function = "fanin14";
};
fanin15_pins: fanin15-pins {
groups = "fanin15";
function = "fanin15";
};
pwm0_pins: pwm0-pins {
groups = "pwm0";
function = "pwm0";
};
pwm1_pins: pwm1-pins {
groups = "pwm1";
function = "pwm1";
};
pwm2_pins: pwm2-pins {
groups = "pwm2";
function = "pwm2";
};
pwm3_pins: pwm3-pins {
groups = "pwm3";
function = "pwm3";
};
r2_pins: r2-pins {
groups = "r2";
function = "r2";
};
r2err_pins: r2err-pins {
groups = "r2err";
function = "r2err";
};
r2md_pins: r2md-pins {
groups = "r2md";
function = "r2md";
};
ga20kbc_pins: ga20kbc-pins {
groups = "ga20kbc";
function = "ga20kbc";
};
smb5d_pins: smb5d-pins {
groups = "smb5d";
function = "smb5d";
};
lpc_pins: lpc-pins {
groups = "lpc";
function = "lpc";
};
espi_pins: espi-pins {
groups = "espi";
function = "espi";
};
rg1_pins: rg1-pins {
groups = "rg1";
function = "rg1";
};
rg1mdio_pins: rg1mdio-pins {
groups = "rg1mdio";
function = "rg1mdio";
};
rg2_pins: rg2-pins {
groups = "rg2";
function = "rg2";
};
ddr_pins: ddr-pins {
groups = "ddr";
function = "ddr";
};
smb0_pins: smb0-pins {
groups = "smb0";
function = "smb0";
};
smb1_pins: smb1-pins {
groups = "smb1";
function = "smb1";
};
smb2_pins: smb2-pins {
groups = "smb2";
function = "smb2";
};
smb2c_pins: smb2c-pins {
groups = "smb2c";
function = "smb2c";
};
smb2b_pins: smb2b-pins {
groups = "smb2b";
function = "smb2b";
};
smb1c_pins: smb1c-pins {
groups = "smb1c";
function = "smb1c";
};
smb1b_pins: smb1b-pins {
groups = "smb1b";
function = "smb1b";
};
smb8_pins: smb8-pins {
groups = "smb8";
function = "smb8";
};
smb9_pins: smb9-pins {
groups = "smb9";
function = "smb9";
};
smb10_pins: smb10-pins {
groups = "smb10";
function = "smb10";
};
smb11_pins: smb11-pins {
groups = "smb11";
function = "smb11";
};
sd1_pins: sd1-pins {
groups = "sd1";
function = "sd1";
};
sd1pwr_pins: sd1pwr-pins {
groups = "sd1pwr";
function = "sd1pwr";
};
pwm4_pins: pwm4-pins {
groups = "pwm4";
function = "pwm4";
};
pwm5_pins: pwm5-pins {
groups = "pwm5";
function = "pwm5";
};
pwm6_pins: pwm6-pins {
groups = "pwm6";
function = "pwm6";
};
pwm7_pins: pwm7-pins {
groups = "pwm7";
function = "pwm7";
};
mmc8_pins: mmc8-pins {
groups = "mmc8";
function = "mmc8";
};
mmc_pins: mmc-pins {
groups = "mmc";
function = "mmc";
};
mmcwp_pins: mmcwp-pins {
groups = "mmcwp";
function = "mmcwp";
};
mmccd_pins: mmccd-pins {
groups = "mmccd";
function = "mmccd";
};
mmcrst_pins: mmcrst-pins {
groups = "mmcrst";
function = "mmcrst";
};
clkout_pins: clkout-pins {
groups = "clkout";
function = "clkout";
};
serirq_pins: serirq-pins {
groups = "serirq";
function = "serirq";
};
lpcclk_pins: lpcclk-pins {
groups = "lpcclk";
function = "lpcclk";
};
scipme_pins: scipme-pins {
groups = "scipme";
function = "scipme";
};
sci_pins: sci-pins {
groups = "sci";
function = "sci";
};
smb6_pins: smb6-pins {
groups = "smb6";
function = "smb6";
};
smb7_pins: smb7-pins {
groups = "smb7";
function = "smb7";
};
pspi1_pins: pspi1-pins {
groups = "pspi1";
function = "pspi1";
};
faninx_pins: faninx-pins {
groups = "faninx";
function = "faninx";
};
r1_pins: r1-pins {
groups = "r1";
function = "r1";
};
spi3_pins: spi3-pins {
groups = "spi3";
function = "spi3";
};
spi3cs1_pins: spi3cs1-pins {
groups = "spi3cs1";
function = "spi3cs1";
};
spi3quad_pins: spi3quad-pins {
groups = "spi3quad";
function = "spi3quad";
};
spi3cs2_pins: spi3cs2-pins {
groups = "spi3cs2";
function = "spi3cs2";
};
spi3cs3_pins: spi3cs3-pins {
groups = "spi3cs3";
function = "spi3cs3";
};
nprd_smi_pins: nprd-smi-pins {
groups = "nprd_smi";
function = "nprd_smi";
};
smb0b_pins: smb0b-pins {
groups = "smb0b";
function = "smb0b";
};
smb0c_pins: smb0c-pins {
groups = "smb0c";
function = "smb0c";
};
smb0den_pins: smb0den-pins {
groups = "smb0den";
function = "smb0den";
};
smb0d_pins: smb0d-pins {
groups = "smb0d";
function = "smb0d";
};
ddc_pins: ddc-pins {
groups = "ddc";
function = "ddc";
};
rg2mdio_pins: rg2mdio-pins {
groups = "rg2mdio";
function = "rg2mdio";
};
wdog1_pins: wdog1-pins {
groups = "wdog1";
function = "wdog1";
};
wdog2_pins: wdog2-pins {
groups = "wdog2";
function = "wdog2";
};
smb12_pins: smb12-pins {
groups = "smb12";
function = "smb12";
};
smb13_pins: smb13-pins {
groups = "smb13";
function = "smb13";
};
spix_pins: spix-pins {
groups = "spix";
function = "spix";
};
spixcs1_pins: spixcs1-pins {
groups = "spixcs1";
function = "spixcs1";
};
clkreq_pins: clkreq-pins {
groups = "clkreq";
function = "clkreq";
};
hgpio0_pins: hgpio0-pins {
groups = "hgpio0";
function = "hgpio0";
};
hgpio1_pins: hgpio1-pins {
groups = "hgpio1";
function = "hgpio1";
};
hgpio2_pins: hgpio2-pins {
groups = "hgpio2";
function = "hgpio2";
};
hgpio3_pins: hgpio3-pins {
groups = "hgpio3";
function = "hgpio3";
};
hgpio4_pins: hgpio4-pins {
groups = "hgpio4";
function = "hgpio4";
};
hgpio5_pins: hgpio5-pins {
groups = "hgpio5";
function = "hgpio5";
};
hgpio6_pins: hgpio6-pins {
groups = "hgpio6";
function = "hgpio6";
};
hgpio7_pins: hgpio7-pins {
groups = "hgpio7";
function = "hgpio7";
};
};
};
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