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https://github.com/AsahiLinux/u-boot
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a2c74aaf51
i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6 chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled. There is on specific switch for on/off L2 Cache, so default select SYS_L2CACHE_OFF. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> |
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clock.c | ||
ddr.c | ||
hab.c | ||
Kconfig | ||
Makefile | ||
mp.c | ||
soc.c |