mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-15 09:27:35 +00:00
8daf89678e
Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
45 lines
1.1 KiB
Text
45 lines
1.1 KiB
Text
menu "MicroBlaze architecture"
|
|
depends on MICROBLAZE
|
|
|
|
config SYS_ARCH
|
|
default "microblaze"
|
|
|
|
config NEEDS_MANUAL_RELOC
|
|
bool "Disable position-independent pre-relocation code"
|
|
default y
|
|
help
|
|
U-Boot expects to be linked to a specific hard-coded address, and to
|
|
be loaded to and run from that address. This option lifts that
|
|
restriction, thus allowing the code to be loaded to and executed from
|
|
almost any 4K aligned address. This logic relies on the relocation
|
|
information that is embedded in the binary to support U-Boot
|
|
relocating itself to the top-of-RAM later during execution.
|
|
|
|
config STATIC_RELA
|
|
def_bool y if !NEEDS_MANUAL_RELOC
|
|
|
|
choice
|
|
prompt "Target select"
|
|
optional
|
|
|
|
config TARGET_MICROBLAZE_GENERIC
|
|
bool "Support microblaze-generic"
|
|
select BOARD_LATE_INIT
|
|
select DM
|
|
select DM_SERIAL
|
|
select OF_CONTROL
|
|
select SUPPORT_SPL
|
|
select SPL_LIBCOMMON_SUPPORT if SPL
|
|
select SPL_LIBGENERIC_SUPPORT if SPL
|
|
select SYSRESET
|
|
select DM_SPI
|
|
select DM_SPI_FLASH
|
|
select SPI
|
|
imply CMD_DM
|
|
|
|
endchoice
|
|
|
|
source "board/xilinx/Kconfig"
|
|
source "board/xilinx/microblaze-generic/Kconfig"
|
|
|
|
endmenu
|