Ye Li cf35290258 imx: imx8ulp: Configure XRDC PDAC and MSC for DBD owner=S400 only ... This patch is used to support DBD owner fuse changed to S400 only. The XRDC PDAC2 for LPAV pbridge5 and MSC1/2/3 for GPIO and LPAV are not configured by S400 default setting. So these PDAC and MSC are invalid, only DBD owner can access the corresponding resources. We have to configure necessary PDAC and MSC for SPL before DDR initialization. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>		2023-03-29 20:15:42 +02:00
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ddr_init.c	arm: imx: add i.MX8ULP EVK support	2021-08-09 14:46:51 +02:00
imx8ulp_evk.c	imx: imx8ulp: Adjust handshake to sync TRDC and XRDC completion	2023-03-29 20:15:42 +02:00
Kconfig	nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig	2022-07-05 17:03:02 -04:00
lpddr4_timing.c	imx: imx8ulp_evk: Update LPDDR4 PHY settings	2022-04-12 17:33:57 +02:00
lpddr4_timing_266.c	imx: imx8ulp: add ND/LD clock	2022-04-12 17:33:56 +02:00
MAINTAINERS	arm: imx: add i.MX8ULP EVK support	2021-08-09 14:46:51 +02:00
Makefile	imx: imx8ulp: add ND/LD clock	2022-04-12 17:33:56 +02:00
spl.c	imx: imx8ulp: Configure XRDC PDAC and MSC for DBD owner=S400 only	2023-03-29 20:15:42 +02:00