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u-boot/arch/x86/cpu/ivybridge
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Simon Glass 77f9b1fb62 x86: ivybridge: Perform Intel microcode update on boot 
Microcode updates are stored in the device tree. Work through these and
apply any that are needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 07:34:14 +01:00
..
car.S x86: chromebook_link: Implement CAR support (cache as RAM) 2014-11-21 07:34:11 +01:00
cpu.c x86: ivybridge: Perform Intel microcode update on boot 2014-11-21 07:34:14 +01:00
Kconfig x86: Add chromebook_link board 2014-11-21 07:34:11 +01:00
lpc.c x86: ivybridge: Add early LPC init so that serial works 2014-11-21 07:34:12 +01:00
Makefile x86: ivybridge: Perform Intel microcode update on boot 2014-11-21 07:34:14 +01:00
microcode_intel.c x86: ivybridge: Perform Intel microcode update on boot 2014-11-21 07:34:14 +01:00
pci.c x86: ivybridge: Enable PCI in early init 2014-11-21 07:34:12 +01:00
sdram.c x86: Add chromebook_link board 2014-11-21 07:34:11 +01:00