u-boot/include/configs/rpi.h
Alexander Stein 060f9bf57b ARM: bcm283x: Define CONFIG_SYS_CACHELINE_SIZE
The cacheline is always 32 bytes for arm1176 CPUs, so define it at board
config level for cache handling code.
The ARM Cortex-A7 has a dcache line size of 64 bytes.

Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2015-08-12 20:47:41 -04:00

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C

/*
* (C) Copyright 2012,2015 Stephen Warren
*
* SPDX-License-Identifier: GPL-2.0
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_SYS_CACHELINE_SIZE 32
#include "rpi-common.h"
#endif