Bin Meng b21b208184 x86: crownbay: Add pci devices in the dts file ... The Topcliff PCH has 4 UART devices integrated (Device 10, Funciton 1/2/3/4). Add the corresponding device nodes in the crownbay.dts per Open Firmware PCI bus bindings. Also a comment block is added for the 'stdout-path' property in the chosen node, mentioning that by default the legacy superio serial port (io addr 0x3f8) is still used on Crown Bay as the console port. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>		2015-01-13 07:24:57 -08:00
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include	Makefile: Support include files for .dts files	2014-06-20 11:55:03 -06:00
microcode	x86: Integrate Tunnel Creek processor microcode	2014-12-18 17:26:05 -07:00
.gitignore	dts: generate multiple device tree blobs	2014-02-19 11:10:05 -05:00
chromebook_link.dts	x86: Add chromebook_link board	2014-11-21 07:34:11 +01:00
crownbay.dts	x86: crownbay: Add pci devices in the dts file	2015-01-13 07:24:57 -08:00
link.dts	x86: Clean up the board dts files	2015-01-12 17:03:40 -08:00
Makefile	x86: Remove alex.dts in arch/x86/dts	2015-01-12 17:03:40 -08:00
serial.dtsi	x86: Use ePAPR defined properties for x86-uart	2015-01-13 07:24:57 -08:00
skeleton.dtsi	x86: fdt: Create basic .dtsi file for coreboot	2012-12-06 14:30:42 -08:00