mirror of
https://github.com/AsahiLinux/u-boot
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2a73606668
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
502 lines
12 KiB
C
502 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2014 Eukréa Electromatique
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* Author: Eric Bénard <eric@eukrea.com>
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* Fabio Estevam <fabio.estevam@freescale.com>
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* Jon Nettleton <jon.nettleton@gmail.com>
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*
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* based on sabresd.c which is :
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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* and on hummingboard.c which is :
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* Copyright (C) 2013 SolidRun ltd.
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* Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com>.
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*/
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#include <common.h>
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#include <init.h>
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#include <net.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/global_data.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <asm/mach-imx/spi.h>
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#include <asm/mach-imx/video.h>
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#include <i2c.h>
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#include <input.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <asm/arch/mxc_hdmi.h>
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#include <asm/arch/crm_regs.h>
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#include <linux/fb.h>
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#include <ipu_pixfmt.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
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PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
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PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
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PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define USDHC_PAD_CLK_CTRL (PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \
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PAD_CTL_HYS)
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#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
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#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
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#define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
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PAD_CTL_ODE | PAD_CTL_SRE_FAST)
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#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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static int board_type = -1;
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#define BOARD_IS_MARSBOARD 0
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#define BOARD_IS_RIOTBOARD 1
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
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return 0;
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}
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static iomux_v3_cfg_t const uart2_pads[] = {
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MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
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}
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iomux_v3_cfg_t const enet_pads[] = {
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/* AR8035 PHY Reset */
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MX6_PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
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/* AR8035 PHY Interrupt */
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MX6_PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(ENET_PAD_CTRL),
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};
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static void setup_iomux_enet(void)
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{
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imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
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/* Reset AR8035 PHY */
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gpio_direction_output(IMX_GPIO_NR(3, 31) , 0);
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mdelay(2);
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gpio_set_value(IMX_GPIO_NR(3, 31), 1);
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}
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int mx6_rgmii_rework(struct phy_device *phydev)
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{
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/* from linux/arch/arm/mach-imx/mach-imx6q.c :
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* Ar803x phy SmartEEE feature cause link status generates glitch,
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* which cause ethernet link down/up issue, so disable SmartEEE
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*/
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phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
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phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d);
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phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003);
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return 0;
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}
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int board_phy_config(struct phy_device *phydev)
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{
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mx6_rgmii_rework(phydev);
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if (phydev->drv->config)
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phydev->drv->config(phydev);
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return 0;
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}
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#ifdef CONFIG_MXC_SPI
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iomux_v3_cfg_t const ecspi1_pads[] = {
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MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
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MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
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MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
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MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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int board_spi_cs_gpio(unsigned bus, unsigned cs)
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{
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return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(2, 30)) : -1;
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}
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static void setup_spi(void)
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{
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imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
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}
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#endif
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struct i2c_pads_info i2c_pad_info1 = {
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.scl = {
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.i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gp = IMX_GPIO_NR(5, 27)
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},
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.sda = {
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.i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gp = IMX_GPIO_NR(5, 26)
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}
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};
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struct i2c_pads_info i2c_pad_info2 = {
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.scl = {
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.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gp = IMX_GPIO_NR(4, 12)
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},
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.sda = {
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.i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gp = IMX_GPIO_NR(4, 13)
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}
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};
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struct i2c_pads_info i2c_pad_info3 = {
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.scl = {
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.i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gp = IMX_GPIO_NR(1, 5)
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},
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.sda = {
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.i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06
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| MUX_PAD_CTRL(I2C_PAD_CTRL),
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.gp = IMX_GPIO_NR(1, 6)
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}
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};
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iomux_v3_cfg_t const tft_pads_riot[] = {
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/* LCD_PWR_EN */
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MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* TOUCH_INT */
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MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* LED_PWR_EN */
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MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* BL LEVEL */
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MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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iomux_v3_cfg_t const tft_pads_mars[] = {
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/* LCD_PWR_EN */
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MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* TOUCH_INT */
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MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* LED_PWR_EN */
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MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* BL LEVEL (PWM4) */
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MX6_PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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#if defined(CONFIG_VIDEO_IPUV3)
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static void enable_lvds(struct display_info_t const *dev)
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{
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struct iomuxc *iomux = (struct iomuxc *)
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IOMUXC_BASE_ADDR;
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setbits_le32(&iomux->gpr[2],
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IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT);
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/* set backlight level to ON */
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if (board_type == BOARD_IS_RIOTBOARD)
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gpio_direction_output(IMX_GPIO_NR(1, 18) , 1);
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else if (board_type == BOARD_IS_MARSBOARD)
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gpio_direction_output(IMX_GPIO_NR(2, 10) , 1);
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}
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static void disable_lvds(struct display_info_t const *dev)
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{
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struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
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/* set backlight level to OFF */
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if (board_type == BOARD_IS_RIOTBOARD)
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gpio_direction_output(IMX_GPIO_NR(1, 18) , 0);
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else if (board_type == BOARD_IS_MARSBOARD)
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gpio_direction_output(IMX_GPIO_NR(2, 10) , 0);
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clrbits_le32(&iomux->gpr[2],
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IOMUXC_GPR2_LVDS_CH0_MODE_MASK);
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}
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static void do_enable_hdmi(struct display_info_t const *dev)
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{
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disable_lvds(dev);
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imx_enable_hdmi_phy();
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}
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static int detect_i2c(struct display_info_t const *dev)
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{
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return (0 == i2c_set_bus_num(dev->bus)) &&
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(0 == i2c_probe(dev->addr));
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}
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struct display_info_t const displays[] = {{
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.bus = -1,
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.addr = 0,
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.pixfmt = IPU_PIX_FMT_RGB24,
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.detect = detect_hdmi,
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.enable = do_enable_hdmi,
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.mode = {
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.name = "HDMI",
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.refresh = 60,
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.xres = 1024,
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.yres = 768,
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.pixclock = 15385,
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.left_margin = 220,
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.right_margin = 40,
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.upper_margin = 21,
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.lower_margin = 7,
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.hsync_len = 60,
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.vsync_len = 10,
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.sync = FB_SYNC_EXT,
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.vmode = FB_VMODE_NONINTERLACED
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} }, {
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.bus = 2,
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.addr = 0x1,
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.pixfmt = IPU_PIX_FMT_LVDS666,
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.detect = detect_i2c,
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.enable = enable_lvds,
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.mode = {
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.name = "LCD8000-97C",
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.refresh = 60,
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.xres = 1024,
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.yres = 768,
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.pixclock = 15385,
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.left_margin = 100,
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.right_margin = 200,
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.upper_margin = 10,
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.lower_margin = 20,
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.hsync_len = 20,
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.vsync_len = 8,
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.sync = FB_SYNC_EXT,
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.vmode = FB_VMODE_NONINTERLACED
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} } };
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size_t display_count = ARRAY_SIZE(displays);
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static void setup_display(void)
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{
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struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
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struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
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int reg;
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enable_ipu_clock();
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imx_setup_hdmi();
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/* Turn on LDB0, IPU,IPU DI0 clocks */
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setbits_le32(&mxc_ccm->CCGR3,
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MXC_CCM_CCGR3_LDB_DI0_MASK);
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/* set LDB0 clk select to 011/011 */
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clrsetbits_le32(&mxc_ccm->cs2cdr,
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MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK,
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(3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET));
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setbits_le32(&mxc_ccm->cscmr2,
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MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
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setbits_le32(&mxc_ccm->chsccdr,
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(CHSCCDR_CLK_SEL_LDB_DI0
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<< MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET));
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reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
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| IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
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| IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
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| IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT
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| IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
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| IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
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| IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED
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| IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0;
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writel(reg, &iomux->gpr[2]);
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clrsetbits_le32(&iomux->gpr[3],
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IOMUXC_GPR3_LVDS0_MUX_CTL_MASK |
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IOMUXC_GPR3_HDMI_MUX_CTL_MASK,
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IOMUXC_GPR3_MUX_SRC_IPU1_DI0
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<< IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
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}
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#endif /* CONFIG_VIDEO_IPUV3 */
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/*
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* Do not overwrite the console
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* Use always serial for U-Boot console
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*/
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int overwrite_console(void)
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{
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return 1;
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}
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int board_early_init_f(void)
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{
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u32 cputype = cpu_type(get_cpu_rev());
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switch (cputype) {
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case MXC_CPU_MX6SOLO:
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board_type = BOARD_IS_RIOTBOARD;
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break;
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case MXC_CPU_MX6D:
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board_type = BOARD_IS_MARSBOARD;
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break;
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}
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setup_iomux_uart();
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if (board_type == BOARD_IS_RIOTBOARD)
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imx_iomux_v3_setup_multiple_pads(
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tft_pads_riot, ARRAY_SIZE(tft_pads_riot));
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else if (board_type == BOARD_IS_MARSBOARD)
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imx_iomux_v3_setup_multiple_pads(
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tft_pads_mars, ARRAY_SIZE(tft_pads_mars));
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#if defined(CONFIG_VIDEO_IPUV3)
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/* power ON LCD */
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gpio_direction_output(IMX_GPIO_NR(1, 29) , 1);
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/* touch interrupt is an input */
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gpio_direction_input(IMX_GPIO_NR(6, 14));
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/* power ON backlight */
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gpio_direction_output(IMX_GPIO_NR(6, 15) , 1);
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/* set backlight level to off */
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if (board_type == BOARD_IS_RIOTBOARD)
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gpio_direction_output(IMX_GPIO_NR(1, 18) , 0);
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else if (board_type == BOARD_IS_MARSBOARD)
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gpio_direction_output(IMX_GPIO_NR(2, 10) , 0);
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setup_display();
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#endif
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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/* i2c1 : PMIC, Audio codec on RiOT, Expansion connector on MarS */
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setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
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/* i2c2 : HDMI EDID */
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setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
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/* i2c3 : LVDS, Expansion connector */
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setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3);
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#ifdef CONFIG_MXC_SPI
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setup_spi();
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#endif
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return 0;
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}
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#ifdef CONFIG_CMD_BMODE
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static const struct boot_mode riotboard_boot_modes[] = {
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{"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
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{"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
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{"emmc", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
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{NULL, 0},
|
|
};
|
|
static const struct boot_mode marsboard_boot_modes[] = {
|
|
{"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
|
|
{"emmc", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
|
|
{NULL, 0},
|
|
};
|
|
#endif
|
|
|
|
int board_late_init(void)
|
|
{
|
|
#ifdef CONFIG_CMD_BMODE
|
|
if (board_type == BOARD_IS_RIOTBOARD)
|
|
add_board_boot_modes(riotboard_boot_modes);
|
|
else if (board_type == BOARD_IS_RIOTBOARD)
|
|
add_board_boot_modes(marsboard_boot_modes);
|
|
#endif
|
|
setup_iomux_enet();
|
|
|
|
return 0;
|
|
}
|
|
|
|
int checkboard(void)
|
|
{
|
|
puts("Board: ");
|
|
if (board_type == BOARD_IS_MARSBOARD)
|
|
puts("MarSBoard\n");
|
|
else if (board_type == BOARD_IS_RIOTBOARD)
|
|
puts("RIoTboard\n");
|
|
else
|
|
printf("unknown - cputype : %02x\n", cpu_type(get_cpu_rev()));
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_SPL_BUILD
|
|
#include <spl.h>
|
|
|
|
void board_init_f(ulong dummy)
|
|
{
|
|
u32 cputype = cpu_type(get_cpu_rev());
|
|
|
|
switch (cputype) {
|
|
case MXC_CPU_MX6SOLO:
|
|
board_type = BOARD_IS_RIOTBOARD;
|
|
break;
|
|
case MXC_CPU_MX6D:
|
|
board_type = BOARD_IS_MARSBOARD;
|
|
break;
|
|
}
|
|
arch_cpu_init();
|
|
|
|
/* setup GP timer */
|
|
timer_init();
|
|
|
|
#ifdef CONFIG_SPL_SERIAL
|
|
setup_iomux_uart();
|
|
preloader_console_init();
|
|
#endif
|
|
}
|
|
|
|
void board_boot_order(u32 *spl_boot_list)
|
|
{
|
|
spl_boot_list[0] = BOOT_DEVICE_MMC1;
|
|
}
|
|
|
|
/*
|
|
* In order to jump to standard u-boot shell, you have to connect pin 5 of J13
|
|
* to pin 3 (ground).
|
|
*/
|
|
int spl_start_uboot(void)
|
|
{
|
|
int gpio_key = IMX_GPIO_NR(4, 16);
|
|
|
|
gpio_direction_input(gpio_key);
|
|
if (gpio_get_value(gpio_key) == 0)
|
|
return 1;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
#endif
|