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u-boot/arch/arm/cpu/armv7/omap5
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Lokesh Vutla 97405d843e ARM: DRA7xx: clocks: Update PLL values 
Update PLL values.
SYS_CLKSEL value for 20MHz is changed to 2. In other platforms
SYS_CLKSEL value 2 represents reserved. But in sys_clk array
ind 1 is used for 13Mhz. Since other platforms are not using
13Mhz, reusing index 1 for 20MHz.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
2013-06-10 08:43:10 -04:00
..
abb.c OMAP3+: introduce generic ABB support 2013-06-10 08:43:09 -04:00
config.mk omap5: Add minimal support for omap5430. 2011-11-15 22:25:50 +01:00
emif.c ARM: OMAP4/5: Make OMAPx_SRAM_SCRATCH_ defines common 2013-05-10 08:25:56 -04:00
hw_data.c ARM: DRA7xx: clocks: Update PLL values 2013-06-10 08:43:10 -04:00
hwinit.c ARM: DRA7xx: Do not enable srcomp for DRA7xx Soc's 2013-06-10 08:43:10 -04:00
Makefile OMAP3+: introduce generic ABB support 2013-06-10 08:43:09 -04:00
prcm-regs.c ARM: DRA7xx: clocks: Update PLL values 2013-06-10 08:43:10 -04:00
sdram.c arm: dra7xx: Add DDR related data for DRA752 ES1.0 2013-03-11 11:06:11 -04:00