mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-02 01:19:49 +00:00
872413bb0a
All uniphier v7 SoCs have cortex-a9 and use cortex-a9 global timer
in a simple implementation. Now DM_TIMER of it is available
on 35751c7f3f
("timer: sti: convert sti-timer to arm a9 global timer"),
so let's switch to it.
The old driver reads the lower 32bits of counter field
and sets the prescaler as 50 with PERIPHCLK(=50MHz),
so the global timer works as a 32-bit 1MHz timer.
The DM_TIMER uses the whole 64bits with no prescaler,
so the global timer works as a 64-bit PERIPHCLK timer.
CONFIG_SYS_HZ_CLOCK is set as the default PERIPHCLK frequency,
if there is no 'clocks' property in devicetree.
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
49 lines
554 B
Text
49 lines
554 B
Text
/ {
|
|
soc {
|
|
u-boot,dm-pre-reloc;
|
|
|
|
timer@60000200 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
serial@54006800 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
serial@54006900 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
serial@54006a00 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
soc-glue@5f800000 {
|
|
u-boot,dm-pre-reloc;
|
|
|
|
pinctrl {
|
|
u-boot,dm-pre-reloc;
|
|
|
|
emmc {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
uart0 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
uart1 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
uart2 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&emmc {
|
|
u-boot,dm-pre-reloc;
|
|
};
|