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https://github.com/AsahiLinux/u-boot
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4e5909450e
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
65 lines
1.9 KiB
C
65 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2020 Cortina Access Inc.
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*
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* Configuration for Cortina-Access Presidio board
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*/
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#ifndef __PRESIDIO_ASIC_H
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#define __PRESIDIO_ASIC_H
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/* Generic Timer Definitions */
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#define CONFIG_SYS_TIMER_RATE 25000000
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#define CONFIG_SYS_TIMER_COUNTER 0xf4321008
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/* note: arch/arm/cpu/armv8/start.S which references GICD_BASE/GICC_BASE
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* does not yet support DT. Thus define it here.
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*/
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#define GICD_BASE 0xf7011000
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#define GICC_BASE 0xf7012000
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#define CONFIG_SYS_TIMER_BASE 0xf4321000
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/* Use external clock source */
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#define PRESIDIO_APB_CLK 125000000
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#define CORTINA_PER_IO_FREQ PRESIDIO_APB_CLK
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/* Cortina Serial Configuration */
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#define CORTINA_UART_CLOCK (PRESIDIO_APB_CLK)
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#define CORTINA_SERIAL_PORTS {(void *)CONFIG_SYS_SERIAL0, \
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(void *)CONFIG_SYS_SERIAL1}
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#define CONFIG_SYS_SERIAL0 PER_UART0_CFG
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#define CONFIG_SYS_SERIAL1 PER_UART1_CFG
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/* SDRAM Bank #1 */
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#define DDR_BASE 0x00000000
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#define PHYS_SDRAM_1 DDR_BASE
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#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2GB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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/* Console I/O Buffer Size */
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#define KSEG1_ATU_XLAT(x) (x)
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/* HW REG ADDR */
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#define NI_READ_POLL_COUNT 1000
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#define CA_NI_MDIO_REG_BASE 0xF4338
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#define NI_HV_GLB_MAC_ADDR_CFG0_OFFSET 0x010
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#define NI_HV_GLB_MAC_ADDR_CFG1_OFFSET 0x014
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#define NI_HV_PT_BASE 0x400
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#define NI_HV_XRAM_BASE 0x820
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#define GLOBAL_BLOCK_RESET_OFFSET 0x04
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#define GLOBAL_GLOBAL_CONFIG_OFFSET 0x20
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#define GLOBAL_IO_DRIVE_CONTROL_OFFSET 0x4c
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/* max command args */
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#define CONFIG_EXTRA_ENV_SETTINGS "silent=y\0"
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/* nand driver parameters */
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#ifdef CONFIG_TARGET_PRESIDIO_ASIC
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#define CFG_SYS_NAND_BASE CONFIG_SYS_FLASH_BASE
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#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
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#endif
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#endif /* __PRESIDIO_ASIC_H */
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