u-boot/board/freescale/mpc8315erdb
Simon Glass 90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
..
Kconfig kconfig: remove redundant "string" type in arch and board Kconfigs 2014-09-13 16:43:55 -04:00
MAINTAINERS mpc83xx: Kconfig: Migrate HRCW to Kconfig 2019-05-21 07:52:25 +02:00
Makefile SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
mpc8315erdb.c common: Drop net.h from common header 2020-05-18 17:33:31 -04:00
README Use correct spelling of "U-Boot" 2016-02-06 12:00:59 +01:00
sdram.c mpc83xx: Get rid of CONFIG_SYS_DDR_SDRAM_BASE 2019-05-21 07:52:33 +02:00

Freescale MPC8315ERDB Board
-----------------------------------------

1.	Board Switches and Jumpers

	S3 is used to set CONFIG_SYS_RESET_SOURCE.

	To boot the image at 0xFE000000 in NOR flash, use these DIP
	switch settings for S3 S4:

	+------+	+------+
	|      |	| **** |
	| **** |	|      |
	+------+ ON	+------+ ON
	  4321		  4321
	(where the '*' indicates the position of the tab of the switch.)

	To boot the image at the beginning of NAND flash, use these
	DIP switch settings for S3 S4:

	+------+	+------+
	| *    |	|  *** |
	|  *** |	| *    |
	+------+ ON	+------+ ON
	  4321		  4321
	(where the '*' indicates the position of the tab of the switch.)

	When booting from NAND, use u-boot-nand.bin, not u-boot.bin.

2.	Memory Map
	The memory map looks like this:

	0x0000_0000	0x07ff_ffff	DDR		 128M
	0x8000_0000	0x8fff_ffff	PCI MEM		 256M
	0x9000_0000	0x9fff_ffff	PCI_MMIO	 256M
	0xe000_0000	0xe00f_ffff	IMMR		 1M
	0xe030_0000	0xe03f_ffff	PCI IO		 1M
	0xe060_0000	0xe060_7fff	NAND FLASH (CS1) 32K
	0xfe00_0000	0xfe7f_ffff	NOR FLASH (CS0)	 8M

	When booting from NAND, NAND flash is CS0 and NOR flash
	is CS1.

3.	Definitions

3.1	Explanation of NEW definitions in:

	include/configs/MPC8315ERDB.h

	CONFIG_MPC83xx		MPC83xx family
	CONFIG_MPC831x		MPC831x specific
	CONFIG_MPC8315		MPC8315 specific
	CONFIG_MPC8315ERDB	MPC8315ERDB board specific

4.	Compilation

	Assuming you're using BASH (or similar) as your shell:

	export CROSS_COMPILE=your-cross-compiler-prefix-
	make distclean
	make MPC8315ERDB_config (or MPC8315ERDB_NAND_config for u-boot-nand.bin)
	make all

5.	Downloading and Flashing Images

5.1	Reflash U-Boot Image using U-Boot

	NOR flash:

	tftp 40000 u-boot.bin
	protect off all
	erase fe000000 fe1fffff

	cp.b 40000 fe000000 xxxx
	protect on all

	You have to supply the correct byte count with 'xxxx'
	from the TFTP result log.

	NAND flash:

	=>tftpboot $loadaddr <filename>
	=>nand erase 0 0x80000
	=>nand write $loadaddr 0 0x80000

	...where 0x80000 is the filesize rounded up to
	the next 0x20000 increment.

5.2	Downloading and Booting Linux Kernel

	Ensure that all networking-related environment variables are set
	properly (including ipaddr, serverip, gatewayip (if needed),
	netmask, ethaddr, eth1addr, rootpath (if using NFS root),
	fdtfile, and bootfile).

	Then, do one of the following, depending on whether you
	want an NFS root or a ramdisk root:

	=>run nfsboot
	or
	=>run ramboot

6	Notes

	The console baudrate for MPC8315ERDB is 115200bps.