mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
35b65dd8ef
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
35 lines
767 B
C
35 lines
767 B
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2012-2014 Panasonic Corporation
|
|
* Copyright (C) 2015-2016 Socionext Inc.
|
|
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
*/
|
|
|
|
#include <cpu_func.h>
|
|
#include <linux/io.h>
|
|
#include <asm/secure.h>
|
|
|
|
#include "sc-regs.h"
|
|
|
|
/* If PSCI is enabled, this is used for SYSTEM_RESET function */
|
|
#ifdef CONFIG_ARMV7_PSCI
|
|
#define __SECURE __secure
|
|
#else
|
|
#define __SECURE
|
|
#endif
|
|
|
|
void __SECURE reset_cpu(void)
|
|
{
|
|
u32 tmp;
|
|
|
|
writel(5, sc_base + SC_IRQTIMSET); /* default value */
|
|
|
|
tmp = readl(sc_base + SC_SLFRSTSEL);
|
|
tmp &= ~0x3; /* mask [1:0] */
|
|
tmp |= 0x0; /* XRST reboot */
|
|
writel(tmp, sc_base + SC_SLFRSTSEL);
|
|
|
|
tmp = readl(sc_base + SC_SLFRSTCTL);
|
|
tmp |= 0x1;
|
|
writel(tmp, sc_base + SC_SLFRSTCTL);
|
|
}
|