u-boot/arch/riscv/lib
Lukas Auer 8c59f2023c riscv: add SPL support
U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-08-26 16:07:42 +08:00
..
andes_plic.c riscv: Add a SYSCON driver for Andestech's PLIC 2019-04-08 09:45:08 +08:00
andes_plmt.c riscv: Add a SYSCON driver for Andestech's PLMT 2019-04-08 09:45:08 +08:00
asm-offsets.c riscv: Introduce CONFIG_XIP to support booting from flash 2019-05-09 16:46:46 +08:00
boot.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
bootm.c riscv: boot images passed to bootm on all harts 2019-04-08 09:44:26 +08:00
cache.c riscv: use invalidate/flush_*cache_range functions in cache.c 2019-01-15 09:36:31 +08:00
crt0_riscv_efi.S efi_loader: use predefined constants in crt0_*_efi.S 2019-07-16 22:17:14 +00:00
elf_riscv32_efi.lds SPDX: Convert single license tags to Linux Kernel style 2018-05-29 14:44:21 +08:00
elf_riscv64_efi.lds SPDX: Convert single license tags to Linux Kernel style 2018-05-29 14:44:21 +08:00
image.c RISCV: image: Add booti support 2019-05-09 16:47:52 +08:00
interrupts.c riscv: clarify error message on undefined exceptions 2019-01-15 09:36:31 +08:00
Makefile riscv: add SPL support 2019-08-26 16:07:42 +08:00
rdtime.c riscv: Implement riscv_get_time() API using rdtime instruction 2018-12-18 09:56:27 +08:00
reloc_riscv_efi.c riscv: Remove unused _relocate arguments 2018-07-19 16:31:37 -04:00
reset.c riscv: cosmetic: Reword do_reset() printf message. 2018-10-03 17:49:27 +08:00
sbi_ipi.c riscv: implement IPI platform functions using SBI 2019-04-08 09:44:26 +08:00
setjmp.S riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I 2018-11-26 13:57:29 +08:00
sifive_clint.c riscv: Add a SYSCON driver for SiFive's Core Local Interruptor 2018-12-18 09:56:26 +08:00
smp.c riscv: Introduce CONFIG_XIP to support booting from flash 2019-05-09 16:46:46 +08:00
spl.c riscv: add SPL support 2019-08-26 16:07:42 +08:00