Lukas Auer 8c59f2023c riscv: add SPL support ... U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly jumping to the image and via OpenSBI firmware. In the first case, both U-Boot SPL and proper must be compiled to run in the same privilege mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine mode and U-Boot proper for supervisor mode. To be able to use SPL, boards have to provide a supported SPL boot device. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>		2019-08-26 16:07:42 +08:00
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cpu	riscv: add SPL support	2019-08-26 16:07:42 +08:00
dts	dts: switch spi-flash to jedec, spi-nor compatible	2019-04-12 10:54:27 +05:30
include/asm	riscv: add SPL support	2019-08-26 16:07:42 +08:00
lib	riscv: add SPL support	2019-08-26 16:07:42 +08:00
config.mk	riscv: qemu: define standalone load address	2019-01-15 09:36:31 +08:00
Kconfig	riscv: add SPL support	2019-08-26 16:07:42 +08:00
Makefile	riscv: add Kconfig entries for the code model	2018-12-18 09:56:26 +08:00