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https://github.com/AsahiLinux/u-boot
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71d2a5e5ef
Synchronize R-Car device trees with Linux 6.1.7, commit 21e996306a6afaae88295858de0ffb8955173a15 . The following script has been used for the synchronization: $ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ; elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/ else echo "NOT FOUND: $i" fi done $ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' ) Move the include/dt-bindings/{clk,clock}/versaclock.h header used by the renesas boards to match Linux 6.1.y as well. Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used by the arch/arm/dts/r8a774c0-cat874.dts board. Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" . Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect the card enumeration in ebisu.dtsi /aliases DT node . Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to reflect the card enumeration in ulcb.dtsi /aliases DT node . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> # r8a779a0-falcon-u-boot.dts Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> # r8a779a0-falcon-u-boot.dts
81 lines
1.8 KiB
Text
81 lines
1.8 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2020, Compass Electronics Group, LLC
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*/
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/dts-v1/;
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#include "r8a774a1.dtsi"
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#include "beacon-renesom-som.dtsi"
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#include "beacon-renesom-baseboard.dtsi"
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/ {
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model = "Beacon EmbeddedWorks RZ/G2M Development Kit";
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compatible = "beacon,beacon-rzg2m", "renesas,r8a774a1";
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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i2c7 = &iic_pmic;
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serial0 = &scif2;
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serial1 = &hscif0;
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serial2 = &hscif1;
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serial3 = &scif0;
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serial4 = &hscif2;
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serial5 = &scif5;
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ethernet0 = &avb;
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mmc0 = &sdhi3;
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mmc1 = &sdhi0;
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mmc2 = &sdhi2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@600000000 {
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device_type = "memory";
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reg = <0x6 0x00000000 0x0 0x80000000>;
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};
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};
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&du {
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pinctrl-0 = <&du_pins>;
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pinctrl-names = "default";
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status = "okay";
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clocks = <&cpg CPG_MOD 724>,
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<&cpg CPG_MOD 723>,
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<&cpg CPG_MOD 722>,
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<&versaclock5 1>,
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<&x302_clk>,
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<&versaclock5 2>;
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clock-names = "du.0", "du.1", "du.2",
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"dclkin.0", "dclkin.1", "dclkin.2";
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};
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/* Reference versaclock instead of audio_clk_a */
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&rcar_sound {
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clocks = <&cpg CPG_MOD 1005>,
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<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
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<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
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<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
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<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
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<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
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<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
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<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
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<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
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<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
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<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
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<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
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<&versaclock6_bb 4>, <&audio_clk_b>,
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<&audio_clk_c>,
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<&cpg CPG_CORE R8A774A1_CLK_S0D4>;
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};
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