mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 10:48:51 +00:00
9774462e34
With the exceptions of ds109, ds414, icnova-a20-swac, nokia_rx51 and stemmy, disable ATAG support. A large number of platforms had enabled support but never supported a kernel so old as to require it. Further, some platforms are old enough to support both, but are well supported by devicetree booting, and have been for a number of years. This is because some of the ATAGs related functions have been re-used to provide the same kind of information, but for devicetree or just generally to inform the user. When needed still, rename these functions to get_board_revision() instead, to avoid conflicts. In other cases, these functions were simply unused, so drop them. Cc: Andre Przywara <andre.przywara@arm.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Phil Sutter <phil@nwl.cc> Cc: Stefan Bosch <stefan_b@posteo.net> Signed-off-by: Tom Rini <trini@konsulko.com>
349 lines
8 KiB
C
349 lines
8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Based on da850evm.c. Original Copyrights follow:
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*
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* Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*/
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#include <common.h>
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#include <env.h>
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#include <i2c.h>
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#include <init.h>
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#include <net.h>
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#include <asm/arch/hardware.h>
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#include <asm/global_data.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/io.h>
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#include <ns16550.h>
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#include <dm/platdata.h>
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#include <linux/errno.h>
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#include <asm/mach-types.h>
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#include <asm/arch/davinci_misc.h>
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#ifdef CONFIG_MMC_DAVINCI
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#include <mmc.h>
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#include <asm/arch/sdmmc_defs.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
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#ifdef CONFIG_MMC_DAVINCI
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/* MMC0 pin muxer settings */
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const struct pinmux_config mmc0_pins[] = {
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/* GP0[11] is required for SD to work on Rev 3 EVMs */
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{ pinmux(0), 8, 4 }, /* GP0[11] */
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{ pinmux(10), 2, 0 }, /* MMCSD0_CLK */
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{ pinmux(10), 2, 1 }, /* MMCSD0_CMD */
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{ pinmux(10), 2, 2 }, /* MMCSD0_DAT_0 */
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{ pinmux(10), 2, 3 }, /* MMCSD0_DAT_1 */
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{ pinmux(10), 2, 4 }, /* MMCSD0_DAT_2 */
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{ pinmux(10), 2, 5 }, /* MMCSD0_DAT_3 */
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/* LCDK supports only 4-bit mode, remaining pins are not configured */
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};
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#endif
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/* UART pin muxer settings */
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static const struct pinmux_config uart_pins[] = {
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{ pinmux(0), 4, 6 },
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{ pinmux(0), 4, 7 },
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{ pinmux(4), 2, 4 },
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{ pinmux(4), 2, 5 }
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};
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#ifdef CONFIG_DRIVER_TI_EMAC
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static const struct pinmux_config emac_pins[] = {
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{ pinmux(2), 8, 1 },
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{ pinmux(2), 8, 2 },
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{ pinmux(2), 8, 3 },
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{ pinmux(2), 8, 4 },
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{ pinmux(2), 8, 5 },
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{ pinmux(2), 8, 6 },
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{ pinmux(2), 8, 7 },
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{ pinmux(3), 8, 0 },
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{ pinmux(3), 8, 1 },
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{ pinmux(3), 8, 2 },
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{ pinmux(3), 8, 3 },
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{ pinmux(3), 8, 4 },
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{ pinmux(3), 8, 5 },
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{ pinmux(3), 8, 6 },
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{ pinmux(3), 8, 7 },
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{ pinmux(4), 8, 0 },
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{ pinmux(4), 8, 1 }
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};
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#endif /* CONFIG_DRIVER_TI_EMAC */
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/* I2C pin muxer settings */
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static const struct pinmux_config i2c_pins[] = {
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{ pinmux(4), 2, 2 },
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{ pinmux(4), 2, 3 }
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};
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#ifdef CONFIG_NAND_DAVINCI
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const struct pinmux_config nand_pins[] = {
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{ pinmux(7), 1, 1 },
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{ pinmux(7), 1, 2 },
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{ pinmux(7), 1, 4 },
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{ pinmux(7), 1, 5 },
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{ pinmux(8), 1, 0 },
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{ pinmux(8), 1, 1 },
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{ pinmux(8), 1, 2 },
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{ pinmux(8), 1, 3 },
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{ pinmux(8), 1, 4 },
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{ pinmux(8), 1, 5 },
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{ pinmux(8), 1, 6 },
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{ pinmux(8), 1, 7 },
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{ pinmux(9), 1, 0 },
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{ pinmux(9), 1, 1 },
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{ pinmux(9), 1, 2 },
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{ pinmux(9), 1, 3 },
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{ pinmux(9), 1, 4 },
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{ pinmux(9), 1, 5 },
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{ pinmux(9), 1, 6 },
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{ pinmux(9), 1, 7 },
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{ pinmux(12), 1, 5 },
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{ pinmux(12), 1, 6 }
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};
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#endif
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#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
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#define HAS_RMII 1
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#else
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#define HAS_RMII 0
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#endif
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const struct pinmux_resource pinmuxes[] = {
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PINMUX_ITEM(uart_pins),
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PINMUX_ITEM(i2c_pins),
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#ifdef CONFIG_NAND_DAVINCI
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PINMUX_ITEM(nand_pins),
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#endif
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};
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const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
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const struct lpsc_resource lpsc[] = {
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{ DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
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{ DAVINCI_LPSC_SPI1 }, /* Serial Flash */
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{ DAVINCI_LPSC_EMAC }, /* image download */
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{ DAVINCI_LPSC_UART2 }, /* console */
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{ DAVINCI_LPSC_GPIO },
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#ifdef CONFIG_MMC_DAVINCI
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{ DAVINCI_LPSC_MMC_SD },
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#endif
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};
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const int lpsc_size = ARRAY_SIZE(lpsc);
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#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
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#define CONFIG_DA850_EVM_MAX_CPU_CLK 456000000
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#endif
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int board_early_init_f(void)
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{
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/*
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* Power on required peripherals
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* ARM does not have access by default to PSC0 and PSC1
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* assuming here that the DSP bootloader has set the IOPU
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* such that PSC access is available to ARM
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*/
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if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
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return 1;
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return 0;
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}
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int board_init(void)
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{
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irq_init();
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/* arch number of the board */
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gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_LCDK;
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/* address of boot parameters */
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gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
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/* setup the SUSPSRC for ARM to control emulation suspend */
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writel(readl(&davinci_syscfg_regs->suspsrc) &
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~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
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DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
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DAVINCI_SYSCFG_SUSPSRC_UART2),
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&davinci_syscfg_regs->suspsrc);
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/* configure pinmux settings */
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if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
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return 1;
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#ifdef CONFIG_NAND_DAVINCI
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/*
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* NAND CS setup - cycle counts based on da850evm NAND timings in the
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* Linux kernel @ 25MHz EMIFA
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*/
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writel((DAVINCI_ABCR_WSETUP(15) |
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DAVINCI_ABCR_WSTROBE(63) |
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DAVINCI_ABCR_WHOLD(7) |
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DAVINCI_ABCR_RSETUP(15) |
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DAVINCI_ABCR_RSTROBE(63) |
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DAVINCI_ABCR_RHOLD(7) |
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DAVINCI_ABCR_TA(3) |
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DAVINCI_ABCR_ASIZE_16BIT),
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&davinci_emif_regs->ab2cr); /* CS3 */
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#endif
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#ifdef CONFIG_MMC_DAVINCI
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if (davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins)) != 0)
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return 1;
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#endif
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#ifdef CONFIG_DRIVER_TI_EMAC
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if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
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return 1;
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davinci_emac_mii_mode_sel(HAS_RMII);
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#endif /* CONFIG_DRIVER_TI_EMAC */
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/* enable the console UART */
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writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
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DAVINCI_UART_PWREMU_MGMT_UTRST),
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&davinci_uart2_ctrl_regs->pwremu_mgmt);
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return 0;
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}
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#define CFG_MAC_ADDR_SPI_BUS 0
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#define CFG_MAC_ADDR_SPI_CS 0
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#define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
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#define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
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void dsp_lpsc_on(unsigned domain, unsigned int id)
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{
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dv_reg_p mdstat, mdctl, ptstat, ptcmd;
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struct davinci_psc_regs *psc_regs;
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psc_regs = davinci_psc0_regs;
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mdstat = &psc_regs->psc0.mdstat[id];
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mdctl = &psc_regs->psc0.mdctl[id];
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ptstat = &psc_regs->ptstat;
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ptcmd = &psc_regs->ptcmd;
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while (*ptstat & (0x1 << domain))
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;
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if ((*mdstat & 0x1f) == 0x03)
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return; /* Already on and enabled */
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*mdctl |= 0x03;
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*ptcmd = 0x1 << domain;
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while (*ptstat & (0x1 << domain))
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;
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while ((*mdstat & 0x1f) != 0x03)
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; /* Probably an overkill... */
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}
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static void dspwake(void)
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{
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unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
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/* if the device is ARM only, return */
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if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10)
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return;
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if (!strcmp(env_get("dspwake"), "no"))
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return;
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*resetvect++ = 0x1E000; /* DSP Idle */
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/* clear out the next 10 words as NOP */
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memset(resetvect, 0, sizeof(unsigned) * 10);
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/* setup the DSP reset vector */
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REG(HOST1CFG) = DAVINCI_L3CBARAM_BASE;
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dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
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REG(PSC0_MDCTL + (15 * 4)) |= 0x100;
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}
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#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
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/**
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* rmii_hw_init
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*
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*/
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int rmii_hw_init(void)
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{
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return 0;
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}
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#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
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int misc_init_r(void)
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{
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#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
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/* Select RMII fucntion through the expander */
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if (rmii_hw_init())
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printf("RMII hardware init failed!!!\n");
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#endif
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dspwake();
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return 0;
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}
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#if !CONFIG_IS_ENABLED(DM_MMC)
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#ifdef CONFIG_MMC_DAVINCI
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static struct davinci_mmc mmc_sd0 = {
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.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
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.host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
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.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
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};
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int board_mmc_init(struct bd_info *bis)
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{
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mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
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/* Add slot-0 to mmc subsystem */
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return davinci_mmc_init(bis, &mmc_sd0);
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}
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#endif
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#endif
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#ifdef CONFIG_SPL_BUILD
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static const struct ns16550_plat serial_pdata = {
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.base = DAVINCI_UART2_BASE,
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.reg_shift = 2,
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.clock = 228000000,
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.fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DRVINFO(omapl138_uart) = {
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.name = "ns16550_serial",
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.plat = &serial_pdata,
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};
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static const struct davinci_mmc_plat mmc_plat = {
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.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
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.cfg = {
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.f_min = 200000,
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.f_max = 25000000,
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.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
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.host_caps = MMC_MODE_4BIT,
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.b_max = DAVINCI_MAX_BLOCKS,
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.name = "da830-mmc",
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},
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};
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U_BOOT_DRVINFO(omapl138_mmc) = {
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.name = "ti_da830_mmc",
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.plat = &mmc_plat,
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};
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void spl_board_init(void)
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{
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davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins));
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}
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#endif
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