arm: Disable ATAGs support

With the exceptions of ds109, ds414, icnova-a20-swac, nokia_rx51 and
stemmy, disable ATAG support.  A large number of platforms had enabled
support but never supported a kernel so old as to require it.  Further,
some platforms are old enough to support both, but are well supported by
devicetree booting, and have been for a number of years.  This is
because some of the ATAGs related functions have been re-used to provide
the same kind of information, but for devicetree or just generally to
inform the user.  When needed still, rename these functions to
get_board_revision() instead, to avoid conflicts.  In other cases, these
functions were simply unused, so drop them.

Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2021-08-30 09:16:30 -04:00
parent b9d66a061b
commit 9774462e34
151 changed files with 116 additions and 563 deletions

View file

@ -1907,6 +1907,36 @@ config TARGET_XENGUEST_ARM64
select SSCANF
endchoice
config SUPPORT_PASSING_ATAGS
bool "Support pre-devicetree ATAG-based booting"
depends on !ARM64
imply SETUP_MEMORY_TAGS
help
Support for booting older Linux kernels, using ATAGs rather than
passing a devicetree. This is option is rarely used, and the
semantics are defined at
https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
config SETUP_MEMORY_TAGS
bool "Pass memory size information via ATAG"
depends on SUPPORT_PASSING_ATAGS
config CMDLINE_TAG
bool "Pass Linux kernel cmdline via ATAG"
depends on SUPPORT_PASSING_ATAGS
config INITRD_TAG
bool "Pass initrd starting point and size via ATAG"
depends on SUPPORT_PASSING_ATAGS
config REVISION_TAG
bool "Pass system revision via ATAG"
depends on SUPPORT_PASSING_ATAGS
config SERIAL_TAG
bool "Pass system serial number via ATAG"
depends on SUPPORT_PASSING_ATAGS
config ARCH_SUPPORT_TFABOOT
bool

View file

@ -196,12 +196,14 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
int rev = 0;
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
#endif
/*
* called prior to booting kernel or by 'fdt boardsetup' command

View file

@ -2,4 +2,4 @@
#
# Copyright (C) 2021 Phil Sutter <phil@nwl.cc>
obj-y += legacy.o
obj-$(SUPPORT_PASSING_ATAGS) += legacy.o

View file

@ -48,6 +48,7 @@ static const u32 CCAT_MODE_RUN = 0x0033DC8F;
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@ -59,6 +60,7 @@ u32 get_board_rev(void)
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
#endif
/*
* Set CCAT mode

View file

@ -38,11 +38,6 @@ int board_init(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
void reset_cpu(void)
{
}

View file

@ -720,10 +720,12 @@ int dram_init(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS);
}
#endif
static struct mxc_serial_plat cm_fx6_mxc_serial_plat = {
.reg = (struct mxc_uart *)UART4_BASE,

View file

@ -232,6 +232,7 @@ const int lpsc_size = ARRAY_SIZE(lpsc);
#define REV_AM18X_EVM 0x100
#ifdef CONFIG_REVISION_TAG
/*
* get_board_rev() - setup to pass kernel board revision information
* Returns:
@ -259,6 +260,7 @@ u32 get_board_rev(void)
rev = 1;
return rev;
}
#endif
int board_early_init_f(void)
{

View file

@ -143,20 +143,6 @@ const int lpsc_size = ARRAY_SIZE(lpsc);
#define CONFIG_DA850_EVM_MAX_CPU_CLK 456000000
#endif
/*
* get_board_rev() - setup to pass kernel board revision information
* Returns:
* bit[0-3] Maximum cpu clock rate supported by onboard SoC
* 0000b - 300 MHz
* 0001b - 372 MHz
* 0010b - 408 MHz
* 0011b - 456 MHz
*/
u32 get_board_rev(void)
{
return 0;
}
int board_early_init_f(void)
{
/*

View file

@ -71,11 +71,6 @@ u32 spl_boot_device(void)
}
#endif
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -71,11 +71,6 @@ u32 spl_boot_device(void)
}
#endif
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -35,6 +35,7 @@ int dram_init(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
u32 rev = get_cpu_rev();
@ -42,6 +43,7 @@ u32 get_board_rev(void)
rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET;
return rev;
}
#endif
#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH)

View file

@ -32,6 +32,7 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@ -46,6 +47,7 @@ u32 get_board_rev(void)
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
#endif
#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)

View file

@ -321,12 +321,14 @@ static void setup_gpmi_nand(void)
}
#endif
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
int rev = nxp_board_rev();
return (get_cpu_rev() & ~(0xF << 8)) | rev;
}
#endif
static int ar8031_phy_fixup(struct phy_device *phydev)
{

View file

@ -295,12 +295,12 @@ static void set_ether_addr(void)
env_set("ethaddr", ethaddr);
}
#ifdef CONFIG_REVISION_TAG
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
static void set_board_rev(void)
{
char info[64] = {0, };
snprintf(info, ARRAY_SIZE(info), "%02x", get_board_rev());
snprintf(info, ARRAY_SIZE(info), "%02x", get_board_revision());
env_set("board_rev", info);
}
#endif
@ -310,7 +310,7 @@ static void set_dtb_name(void)
char info[64] = {0, };
snprintf(info, ARRAY_SIZE(info),
"s5p4418-nanopi2-rev%02x.dtb", get_board_rev());
"s5p4418-nanopi2-rev%02x.dtb", get_board_revision());
env_set("dtb_name", info);
}
@ -436,7 +436,7 @@ int board_late_init(void)
{
bd_update_env();
#ifdef CONFIG_REVISION_TAG
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
set_board_rev();
#endif
set_dtb_name();

View file

@ -80,11 +80,18 @@ void bd_base_rev_init(void)
}
/* To override __weak symbols */
u32 get_board_rev(void)
u32 get_board_revision(void)
{
return (base_rev << 8) | pcb_rev;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return get_board_revision();
}
#endif
const char *get_board_name(void)
{
bd_hwrev_init();

View file

@ -9,7 +9,7 @@
extern void bd_hwrev_init(void);
extern void bd_base_rev_init(void);
extern u32 get_board_rev(void);
extern u32 get_board_revision(void);
extern const char *get_board_name(void);
#endif /* __BD_HW_REV_H__ */

View file

@ -81,10 +81,12 @@ int dram_init_banksize(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return get_cpu_rev() & ~(0xF << 8);
}
#endif
#ifdef CONFIG_USB_EHCI_MX5
int board_ehci_hcd_init(int port)

View file

@ -27,6 +27,7 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@ -38,6 +39,7 @@ u32 get_board_rev(void)
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
#endif
struct fsl_esdhc_cfg esdhc_cfg[1] = {
{MMC_SDHC1_BASE_ADDR}

View file

@ -156,11 +156,13 @@ int misc_init_r(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
/* Sold devices are expected to be at least revision F. */
return 6;
}
#endif
void get_board_serial(struct tag_serialnr *serialnr)
{

View file

@ -241,6 +241,7 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
/*
* Routine: get_board_revision
* Description: Return board revision.
@ -249,6 +250,7 @@ u32 get_board_rev(void)
{
return simple_strtol(hw_build_ptr, NULL, 16);
}
#endif
/*
* Routine: setup_board_tags

View file

@ -419,7 +419,7 @@ int misc_init_r(void)
return 0;
}
static void get_board_rev(void)
static void get_board_revision(void)
{
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_board_rev, msg, 1);
int ret;
@ -478,7 +478,7 @@ int board_init(void)
hw_watchdog_init();
#endif
get_board_rev();
get_board_revision();
gd->bd->bi_boot_params = 0x100;

View file

@ -47,18 +47,6 @@ struct odroid_rev_info odroid_info[] = {
{ EXYNOS5_BOARD_ODROID_UNKNOWN, 0, 4095, "unknown" },
};
static unsigned int odroid_get_rev(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(odroid_info); i++) {
if (odroid_info[i].board_type == gd->board_type)
return odroid_info[i].board_rev;
}
return 0;
}
/*
* Read ADC at least twice and check the resuls. If regulator providing voltage
* on to measured point was just turned on, first reads might require time
@ -200,6 +188,19 @@ bool board_is_generic(void)
return false;
}
#ifdef CONFIG_REVISION_TAG
static unsigned int odroid_get_rev(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(odroid_info); i++) {
if (odroid_info[i].board_type == gd->board_type)
return odroid_info[i].board_rev;
}
return 0;
}
/**
* get_board_rev() - return detected board revision.
*
@ -212,6 +213,7 @@ u32 get_board_rev(void)
return odroid_get_rev();
}
#endif
/**
* get_board_type() - returns board type string.

View file

@ -24,11 +24,6 @@
DECLARE_GLOBAL_DATA_PTR;
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
/* Set Initial global variables */

View file

@ -12,11 +12,6 @@
#include <asm/arch/pinmux.h>
#include <usb.h>
u32 get_board_rev(void)
{
return 0;
}
int exynos_init(void)
{
return 0;

View file

@ -67,10 +67,12 @@ static void check_hw_revision(void)
board_rev = modelrev << 8;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return board_rev;
}
#endif
static inline u32 get_model_rev(void)
{

View file

@ -33,10 +33,12 @@ DECLARE_GLOBAL_DATA_PTR;
unsigned int board_rev;
static int init_pmic_lcd(void);
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return board_rev;
}
#endif
int exynos_power_init(void)
{

View file

@ -46,11 +46,6 @@ int dram_init_banksize(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -40,11 +40,6 @@ int dram_init_banksize(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -40,11 +40,6 @@ int dram_init_banksize(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -77,12 +77,7 @@ u32 spl_boot_device(void)
{
return BOOT_DEVICE_XIP;
}
#endif
u32 get_board_rev(void)
{
return 0;
}
int board_late_init(void)
{

View file

@ -36,11 +36,6 @@ int dram_init_banksize(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -36,11 +36,6 @@ int dram_init_banksize(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View file

@ -41,11 +41,6 @@ int board_early_init_f(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_late_init(void)
{
return 0;

View file

@ -312,6 +312,7 @@ void board_mmc_power_init(void)
#endif
#endif
#ifdef CONFIG_REVISION_TAG
/*
* get_board_rev() - get board revision
*/
@ -319,3 +320,4 @@ u32 get_board_rev(void)
{
return 0x20;
}
#endif

View file

@ -104,6 +104,7 @@ int spl_start_uboot(void)
}
#endif /* CONFIG_SPL_OS_BOOT */
#ifdef CONFIG_REVISION_TAG
/*
* get_board_rev() - get board revision
*/
@ -111,3 +112,4 @@ u32 get_board_rev(void)
{
return 0x20;
}
#endif

View file

@ -707,12 +707,11 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#if defined(CONFIG_REVISION_TAG) && \
defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
char env_str[256];
u32 rev;
rev = get_board_rev();
rev = get_board_revision();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
env_set("board_rev", env_str);

View file

@ -611,12 +611,11 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#if defined(CONFIG_REVISION_TAG) && \
defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
char env_str[256];
u32 rev;
rev = get_board_rev();
rev = get_board_revision();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
env_set("board_rev", env_str);
#endif

View file

@ -32,8 +32,8 @@ static char tdx_car_rev_str[6];
static char *tdx_carrier_board_name;
#endif
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
u32 get_board_revision(void)
{
/* Check validity */
if (!tdx_hw_tag.ver_major)
@ -183,8 +183,8 @@ int ft_common_board_setup(void *blob, struct bd_info *bd)
#else /* CONFIG_TDX_CFG_BLOCK */
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
u32 get_board_revision(void)
{
return 0;
}

View file

@ -10,6 +10,7 @@
#define TDX_USB_VID 0x1B67
int ft_common_board_setup(void *blob, struct bd_info *bd);
u32 get_board_revision(void);
#if defined(CONFIG_DM_VIDEO)
int show_boot_logo(void);

View file

@ -3,6 +3,9 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_DS109=y

View file

@ -1,6 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y

View file

@ -1,5 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SERIAL_TAG=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac"
CONFIG_SPL=y
CONFIG_MACH_SUN7I=y

View file

@ -2,6 +2,10 @@ CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_REVISION_TAG=y
CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SYS_MALLOC_LEN=0xc0000

View file

@ -1,6 +1,9 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_U8500=y
CONFIG_SUPPORT_PASSING_ATAGS=y
# CONFIG_SETUP_MEMORY_TAGS is not set
CONFIG_INITRD_TAG=y
CONFIG_SYS_TEXT_BASE=0x100000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SYS_MALLOC_LEN=0x0200000

View file

@ -37,15 +37,6 @@
* for your console driver.
*/
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
#define MTDPARTS_MTDOOPS "errlog"
#define CONFIG_DOS_PARTITION
@ -60,11 +51,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/
/* size in bytes reserved for initial data */

View file

@ -37,15 +37,6 @@
* for your console driver.
*/
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
#define MTDPARTS_MTDOOPS "errlog"
#define CONFIG_DOS_PARTITION

View file

@ -14,8 +14,6 @@
#include <configs/ti_omap3_common.h>
#define CONFIG_REVISION_TAG
/* Hardware drivers */
/*

View file

@ -23,11 +23,6 @@
#include "imx6_spl.h"
#endif
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */

View file

@ -13,9 +13,6 @@
#include <asm/arch/platform.h>
/* Misc CPU related */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SYS_SDRAM_BASE ASPEED_DRAM_BASE

View file

@ -35,9 +35,6 @@
#endif
/* Misc CPU related */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */

View file

@ -22,10 +22,6 @@
#include <asm/hardware.h>
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_ATMEL_LEGACY
/*

View file

@ -22,10 +22,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
#ifndef CONFIG_SYS_USE_BOOT_NORFLASH
#else
#define CONFIG_SYS_USE_NORFLASH

View file

@ -18,10 +18,6 @@
#define CONFIG_AT91SAM9M10G45EK
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */

View file

@ -14,9 +14,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
/* Misc CPU related */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* LCD */
#define LCD_BPP LCD_COLOR16

View file

@ -16,10 +16,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
#define CONFIG_ATMEL_LEGACY
/*

View file

@ -12,10 +12,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */

View file

@ -119,7 +119,6 @@ extern phys_addr_t prior_stage_fdt_address;
/*
* Informational display configuration.
*/
#define CONFIG_REVISION_TAG
/*
* Command configuration.

View file

@ -60,9 +60,6 @@
#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
/* Enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG
/* NAND support */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 1

View file

@ -24,10 +24,6 @@
#define CONFIG_POWER_TPS65217
/* Support both device trees and ATAGs. */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/*#define CONFIG_MACH_TYPE 3589*/
#define CONFIG_MACH_TYPE 0xFFFFFFFF /* TODO: check with kernel*/

View file

@ -24,9 +24,6 @@
#define CONFIG_FSL_USDHC
/* Boot */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_MACH_TYPE 0xFFFFFFFF
/* misc */

View file

@ -60,11 +60,6 @@ BUR_COMMON_ENV \
" bootm ${loadaddr} - ${dtbaddr}\0"
#endif /* !CONFIG_SPL_BUILD*/
/* Support both device trees and ATAGs. */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* SPI Flash */
/* Environment */

View file

@ -57,11 +57,6 @@ BUR_COMMON_ENV \
#define CONFIG_BOOTCOMMAND "mmc dev 1; run b_default"
/* Support both device trees and ATAGs. */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* Environment */
#endif /* __CONFIG_BRXRE1_H__ */

View file

@ -21,11 +21,6 @@
#include "imx6_spl.h"
#endif
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */

View file

@ -28,8 +28,6 @@
"fi; " \
"bootm 0xc0000;"
#define CONFIG_TIMESTAMP
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
/*
* Serial Console Configuration

View file

@ -29,10 +29,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */

View file

@ -177,9 +177,6 @@
*/
#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
#define CONFIG_HWCONFIG /* enable hwconfig */
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTCOMMAND \
"run envboot; " \

View file

@ -109,12 +109,6 @@
* U-Boot Commands
*/
/*
* Boot Linux
*/
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTFILE "uImage"
/*

View file

@ -34,8 +34,6 @@
#include <configs/ti_omap3_common.h>
#define CONFIG_REVISION_TAG 1
/* Hardware drivers */
/* DM9000 */
#define CONFIG_NET_RETRY_COUNT 20

View file

@ -27,11 +27,6 @@
/* Miscellaneous configurable options */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
/* Bootcounter */
#define CONFIG_SYS_BOOTCOUNT_BE

View file

@ -47,11 +47,6 @@
#include "imx6_spl.h"
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART_BASE UART5_BASE
/* I2C Configs */

View file

@ -94,15 +94,6 @@
/* auto boot */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
/*

View file

@ -122,9 +122,6 @@
/* File systems */
/* Boot command */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
"sf read 0x22000000 0xc6000 0x294000; " \
"bootm 0x22000000"

View file

@ -22,10 +22,6 @@
#define CONFIG_SYS_CLK_FREQ 24000000
#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
/* select serial console configuration */
/* PWM */

View file

@ -14,8 +14,6 @@
#define CONFIG_BOARD_COMMON
#define CONFIG_REVISION_TAG
/* SD/MMC configuration */
#define CONFIG_MMC_DEFAULT_DEV 0

View file

@ -23,11 +23,6 @@
/* This is required to setup the ESDC controller */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/*
* Hardware drivers
*/

View file

@ -19,11 +19,6 @@
#include "mx6_common.h"
#include <linux/sizes.h>
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
/* SATA Configs */
#ifdef CONFIG_CMD_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1

View file

@ -13,7 +13,6 @@
/* Miscellaneous */
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_CMDLINE_TAG
/* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */
#define CONFIG_SYS_SDRAM_BASE 0x20000000

View file

@ -15,10 +15,6 @@
#define CONFIG_MX27
#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
/*
* Lowlevel configuration
*/

View file

@ -8,9 +8,6 @@
#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
/*
* There are various dependencies on the core module (CM) fitted
* Users should refer to their CM user guide

View file

@ -54,15 +54,6 @@
"appended one; fi\0" \
""
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
/*
* NAND Flash configuration
*/

View file

@ -16,10 +16,6 @@
#include "imx6_spl.h" /* common IMX6 SPL configuration */
/* Miscellaneous configurable options */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
/* FEC ethernet */
#define CONFIG_ARP_TIMEOUT 200UL

View file

@ -12,10 +12,6 @@
#include <asm/arch/rmobile.h>
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* MEMORY */
#define KZM_SDRAM_BASE (0x40000000)
#define PHYS_SDRAM KZM_SDRAM_BASE

View file

@ -60,8 +60,6 @@
*/
#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
#define CONFIG_HWCONFIG /* enable hwconfig */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_SETUP_INITRD_TAG
#define CONFIG_BOOTCOMMAND \
"if mmc rescan; then " \

View file

@ -147,8 +147,6 @@
#define CONFIG_PCI_SCAN_SHOW
#endif
#define CONFIG_CMDLINE_TAG
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200

View file

@ -387,8 +387,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_PCI_SCAN_SHOW
#endif
#define CONFIG_CMDLINE_TAG
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200

View file

@ -233,8 +233,6 @@
#define CONFIG_PCI_SCAN_SHOW
#endif
#define CONFIG_CMDLINE_TAG
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200

View file

@ -365,8 +365,6 @@ unsigned long get_board_sys_clk(void);
* Environment
*/
#define CONFIG_CMDLINE_TAG
#include <asm/fsl_secure_boot.h>
#endif /* __LS1043AQDS_H__ */

View file

@ -377,8 +377,6 @@ unsigned long get_board_sys_clk(void);
* Environment
*/
#define CONFIG_CMDLINE_TAG
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \

View file

@ -11,7 +11,6 @@
#include <asm/arch/imx-regs.h>
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_FSL_CLK
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
@ -130,10 +129,6 @@
/*
* Boot Linux
*/
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTFILE "boot/fitImage"
#define CONFIG_BOOTCOMMAND "run mmc_mmc"

View file

@ -32,11 +32,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
/* Misc CPU related */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SERIAL_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
/*
* Hardware drivers

View file

@ -12,9 +12,6 @@
#include <linux/sizes.h>
/* Miscellaneous configurable options */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_TAG
#define CONFIG_SYS_MAXARGS 8
#define CONFIG_SYS_BOOTM_LEN SZ_64M

View file

@ -12,9 +12,6 @@
#include <linux/sizes.h>
/* Miscellaneous configurable options */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_TAG
#define CONFIG_SYS_MAXARGS 8
#define CONFIG_SYS_BOOTM_LEN SZ_64M

View file

@ -41,15 +41,6 @@
/* auto boot */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
/*

View file

@ -25,15 +25,6 @@
4000000, 4500000, 5000000, 5500000, \
6000000 }
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
/*

View file

@ -19,15 +19,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
115200, 230400, 460800, 921600 }
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
/*

View file

@ -16,11 +16,6 @@
#include <asm/arch/imx-regs.h>
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
/*
* Hardware drivers

View file

@ -14,14 +14,8 @@
#include <asm/arch/imx-regs.h>
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SYS_FSL_CLK
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONFIG_FPGA_COUNT 1

View file

@ -13,14 +13,8 @@
#include <asm/arch/imx-regs.h>
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SYS_FSL_CLK
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */

View file

@ -11,14 +11,8 @@
#include <asm/arch/imx-regs.h>
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SYS_FSL_CLK
#define CONFIG_REVISION_TAG
/* USB Configs */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX

View file

@ -33,12 +33,6 @@
#define CONFIG_SYS_FSL_CLK
/* ATAGs */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 32

Some files were not shown because too many files have changed in this diff Show more