mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 10:48:51 +00:00
775011980b
With the correct settings described in the device-tree the PHY settings in the board init are no longer required. The values are taken from the linux device tree. The PHY latency settings are derived from the phy-mode property and the voltage seetings are done via the regulator. Suggested-by: Michael Walle <michael@walle.cc> Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com> Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK Reviewed-by: Fabio Estevam <festevam@gmail.com> |
||
---|---|---|
.. | ||
ddr4_timing.c | ||
ddr4_timing_ld.c | ||
imx8mn_evk.c | ||
imximage-8mn-ddr4.cfg | ||
Kconfig | ||
lpddr4_timing.c | ||
lpddr4_timing_ld.c | ||
MAINTAINERS | ||
Makefile | ||
spl.c |