u-boot/drivers/fpga
Oleksandr Suvorov 7a9a0df89b fpga: xilinx: pass compatible flags to xilinx_load()
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-6-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
..
ACEX1K.c common: Drop linux/delay.h from common header 2020-05-18 21:19:23 -04:00
altera.c fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox 2020-10-09 17:53:12 +08:00
cyclon2.c common: Drop linux/delay.h from common header 2020-05-18 21:19:23 -04:00
fpga.c fpga: xilinx: pass compatible flags to xilinx_load() 2022-07-26 09:34:21 +02:00
intel_sdm_mb.c arm: socfpga: soc64: Add ATF support for FPGA reconfig driver 2021-01-15 17:48:37 +08:00
ivm_core.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
Kconfig fpga: add option for loading FPGA secure bitstreams 2022-07-26 08:42:16 +02:00
lattice.c common: Drop linux/delay.h from common header 2020-05-18 21:19:23 -04:00
Makefile fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox 2020-10-09 17:53:12 +08:00
socfpga.c WS cleanup: remove trailing empty lines 2021-09-30 08:08:56 -04:00
socfpga_arria10.c socfpga: arria10: Wait for fifo empty after writing bitstream 2022-07-01 14:57:14 +08:00
socfpga_gen5.c arm: socfpga: Convert system manager from struct to defines 2020-01-07 14:38:33 +01:00
spartan2.c fpga: Convert SYS_FPGA_PROG_FEEDBACK to Kconfig 2022-07-26 08:39:43 +02:00
spartan3.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
stratixII.c common: Drop linux/delay.h from common header 2020-05-18 21:19:23 -04:00
stratixv.c common: Drop linux/delay.h from common header 2020-05-18 21:19:23 -04:00
versalpl.c xilinx: zynqmp: synchronize firmware call return payload 2020-08-20 09:49:20 +02:00
virtex2.c fpga: Convert SYS_FPGA_PROG_FEEDBACK to Kconfig 2022-07-26 08:39:43 +02:00
xilinx.c fpga: xilinx: pass compatible flags to xilinx_load() 2022-07-26 09:34:21 +02:00
zynqmppl.c fpga: zynqmp: add str2flags call 2022-07-26 09:34:21 +02:00
zynqpl.c fpga: zynqpl: fix buffer alignment 2021-02-23 14:56:55 +01:00