fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox

Rename Stratix10 FPGA driver to Intel FPGA SDM Mailbox driver
because it is using generic SDM (Secure Device Manager) Mailbox
interface shared by other platform (e.g. Agilex) as well.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
This commit is contained in:
Chee Hong Ang 2020-08-07 11:50:03 +08:00 committed by Ley Foon Tan
parent 2473e13bb8
commit d2170168dd
7 changed files with 19 additions and 17 deletions

View file

@ -79,7 +79,7 @@ config TARGET_SOCFPGA_STRATIX10
select ARMV8_MULTIENTRY
select ARMV8_SET_SMPEN
select ARMV8_SPIN_TABLE
select FPGA_STRATIX10
select FPGA_INTEL_SDM_MAILBOX
choice
prompt "Altera SOCFPGA board select"

View file

@ -24,7 +24,7 @@ DECLARE_GLOBAL_DATA_PTR;
static Altera_desc altera_fpga[] = {
{
/* Family */
Intel_FPGA_Stratix10,
Intel_FPGA_SDM_Mailbox,
/* Interface type */
secure_device_manager_mailbox,
/* No limitation as additional data will be ignored */

View file

@ -31,16 +31,16 @@ config FPGA_CYCLON2
Enable FPGA driver for loading bitstream in BIT and BIN format
on Altera Cyclone II device.
config FPGA_STRATIX10
bool "Enable Altera FPGA driver for Stratix 10"
config FPGA_INTEL_SDM_MAILBOX
bool "Enable Intel FPGA Full Reconfiguration SDM Mailbox driver"
depends on TARGET_SOCFPGA_STRATIX10
select FPGA_ALTERA
help
Say Y here to enable the Altera Stratix 10 FPGA specific driver
Say Y here to enable the Intel FPGA Full Reconfig SDM Mailbox driver
This provides common functionality for Altera Stratix 10 devices.
Enable FPGA driver for writing bitstream into Altera Stratix10
device.
This provides common functionality for Intel FPGA devices.
Enable FPGA driver for writing full bitstream into Intel FPGA
devices through SDM (Secure Device Manager) Mailbox.
config FPGA_XILINX
bool "Enable Xilinx FPGA drivers"

View file

@ -16,9 +16,9 @@ ifdef CONFIG_FPGA_ALTERA
obj-y += altera.o
obj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
obj-$(CONFIG_FPGA_INTEL_SDM_MAILBOX) += intel_sdm_mb.o
obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
obj-$(CONFIG_FPGA_STRATIX10) += stratix10.o
obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += socfpga_gen5.o
obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += socfpga_arria10.o

View file

@ -40,12 +40,13 @@ static const struct altera_fpga {
#if defined(CONFIG_FPGA_STRATIX_V)
{ Altera_StratixV, "StratixV", stratixv_load, NULL, NULL },
#endif
#if defined(CONFIG_FPGA_STRATIX10)
{ Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL, NULL },
#endif
#if defined(CONFIG_FPGA_SOCFPGA)
{ Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
#endif
#if defined(CONFIG_FPGA_INTEL_SDM_MAILBOX)
{ Intel_FPGA_SDM_Mailbox, "Intel SDM Mailbox", intel_sdm_mb_load, NULL,
NULL },
#endif
};
static int altera_validate(Altera_desc *desc, const char *fn)

View file

@ -247,7 +247,7 @@ static int send_reconfig_data(const void *rbf_data, size_t rbf_size,
* This is the interface used by FPGA driver.
* Return 0 for success, non-zero for error.
*/
int stratix10_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
{
int ret;
u32 resp_len = 2;

View file

@ -56,10 +56,10 @@ enum altera_family {
Altera_StratixII,
/* StratixV Family */
Altera_StratixV,
/* Stratix10 Family */
Intel_FPGA_Stratix10,
/* SoCFPGA Family */
Altera_SoCFPGA,
/* Intel FPGA Family with SDM (Secure Device Manager) Mailbox */
Intel_FPGA_SDM_Mailbox,
/* Add new models here */
@ -120,8 +120,9 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
#endif
#ifdef CONFIG_FPGA_STRATIX10
int stratix10_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
#ifdef CONFIG_FPGA_INTEL_SDM_MAILBOX
int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data,
size_t rbf_size);
#endif
#endif /* _ALTERA_H_ */