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The PWM pins on North Bridge on Armada 37xx can be configured into PWM
or GPIO functions. When in PWM function, each pin can also be configured
to drive low on 0 and tri-state on 1 (LED mode).
The current definitions handle this by declaring two pin groups for each
pin:
- group "pwmN" with functions "pwm" and "gpio"
- group "ledN_od" ("od" for open drain) with functions "led" and "gpio"
This is semantically incorrect. The correct definition for each pin
should be one group with three functions: "pwm", "led" and "gpio".
Change the "pwmN" groups to support "led" function.
Remove "ledN_od" groups. This cannot break backwards compatibility with
older device trees: no device tree uses it since there is no PWM driver
for this SOC yet. Also "ledN_od" groups are not even documented.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
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| .. | ||
| atmel,at91-pio4-pinctrl.txt | ||
| bcm6838-pinctrl.txt | ||
| intel,apl-pinctrl.txt | ||
| kendryte,k210-fpioa.txt | ||
| marvell,armada-37xx-pinctrl.txt | ||
| marvell,armada-apn806-pinctrl.txt | ||
| marvell,armada-cp110-pinctrl.txt | ||
| marvell,mvebu-pinctrl.txt | ||
| nexell,s5pxx18-pinctrl.txt | ||
| pinctrl-bindings.txt | ||
| rockchip,pinctrl.txt | ||
| st,stm32-pinctrl.txt | ||