mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-29 16:10:58 +00:00
656e6cc86b
Add a DM port of Marvell pin control driver. The A8K SoC family contains several silicone dies interconnected in a single package. Every die is normally equipped with its own pin controller unit. There are 2 pin controllers in A70x0 SoC and 3 in A80x0 SoC. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
25 lines
739 B
Text
25 lines
739 B
Text
Functions of Armada APN806 pin controller
|
|
Function 0x0 for any MPP ID activates GPIO pin mode
|
|
----------------------------------------------------------------------
|
|
MPP# 0x1 0x2 0x3 0x4
|
|
----------------------------------------------------------------------
|
|
0 SDIO_CLK - SPI0_CLK -
|
|
1 SDIO_CMD - SPI0_MISO -
|
|
2 SDIO_D[0] - SPI0_MOSI -
|
|
3 SDIO_D[1] - SPI0_CS0n -
|
|
4 SDIO_D[2] - I2C0_SDA SPI0_CS1n
|
|
5 SDIO_D[3] - I2C0_SCK -
|
|
6 SDIO_DS - - -
|
|
7 SDIO_D[4] - UART1_RXD -
|
|
8 SDIO_D[5] - UART1_TXD -
|
|
9 SDIO_D[6] - SPI0_CS1n -
|
|
10 SDIO_D[7] - - -
|
|
11 - - UART0_TXD -
|
|
12 SDIO_CARD_PW_OFF SDIO_HW_RST - -
|
|
13 - - - -
|
|
14 - - - -
|
|
15 - - - -
|
|
16 - - - -
|
|
17 - - - -
|
|
18 - - - -
|
|
19 - - UART0_RXD -
|