Michal Simek 7996fcca9d arm: zynq: Remove fclk-enable property for cse-nor target ... Mini cse NOR configuration is running without PL that's why there is no reason to enable clock to PL. Signed-off-by: Michal Simek <michal.simek@xilinx.com>		2018-08-06 08:44:35 +02:00
..
arc	ARC: Enable unaligned access in hardware if compiler uses it	2018-07-31 07:49:47 +03:00
arm	arm: zynq: Remove fclk-enable property for cse-nor target	2018-08-06 08:44:35 +02:00
m68k	m68k: m5253evbe: Remove this board	2018-07-23 14:33:21 -04:00
microblaze	dm: Change CMD_DM enabling	2018-07-30 07:18:48 -04:00
mips	Kconfig: Sort bool, default, select and imply options	2018-07-30 07:18:48 -04:00
nds32	nds32: Define PLATFORM__CLEAR_BIT for generic_clear_bit()	2018-05-15 21:44:05 -04:00
nios2	.gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore	2018-06-18 14:43:12 -04:00
powerpc	Kconfig: Sort bool, default, select and imply options	2018-07-30 07:18:48 -04:00
riscv	efi_loader: Rename sections to allow for implicit data	2018-07-25 14:57:44 +02:00
sandbox	clk: add clk_valid()	2018-08-03 19:53:10 -04:00
sh	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
x86	binman: Rename 'position' to 'offset'	2018-08-01 16:30:06 -06:00
xtensa	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
.gitignore	.gitignore: drop include/asm/proc from ignore pattern	2014-06-19 11:18:54 -04:00
Kconfig	dm: Change CMD_DM enabling	2018-07-30 07:18:48 -04:00