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The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC architecture platform, providing ultra-low-power modes, dual display, multi-sensor edge compute, security and other BOM-saving integration. The AM62 SoC targets broad market to enable applications such as Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building Automation, Appliances and more. Some highlights of this SoC are: * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Pin-to-pin compatible options for single and quad core are available. * Cortex-M4F for general-purpose or safety usage. * Dual display support, providing 24-bit RBG parallel interface and OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display resolution. * Selectable GPUsupport, up to 8GFLOPS, providing better user experience in 3D graphic display case and Android. * PRU(Programmable Realtime Unit) support for customized programmable interfaces/IOs. * Integrated Giga-bit Ethernet switch supporting up to a total of two external ports (TSN capable). * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. * Dedicated Centralized System Controller for Security, Power, and Resource Management. * Multiple low power modes support, ex: Deep sleep,Standby, MCU-only, enabling battery powered system design. AM625 is the first device of the family. Add DT bindings for the same. More details can be found in the Technical Reference Manual: https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Gowtham Tammana <g-tammana@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
103 lines
3.5 KiB
Text
103 lines
3.5 KiB
Text
config RAM
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bool "Enable RAM drivers using Driver Model"
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depends on DM
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help
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This allows drivers to be provided for SDRAM and other RAM
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controllers and their type to be specified in the board's device
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tree. Generally some parameters are required to set up the RAM and
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the RAM size can either be statically defined or dynamically
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detected.
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config SPL_RAM
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bool "Enable RAM support in SPL"
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depends on RAM && SPL_DM
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help
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The RAM subsystem adds a small amount of overhead to the image.
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If this is acceptable and you have a need to use RAM drivers in
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SPL, enable this option. It might provide a cleaner interface to
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setting up RAM (e.g. SDRAM / DDR) within SPL.
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config TPL_RAM
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bool "Enable RAM support in TPL"
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depends on RAM
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help
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The RAM subsystem adds a small amount of overhead to the image.
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If this is acceptable and you have a need to use RAM drivers in
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TPL, enable this option. It might provide a cleaner interface to
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setting up RAM (e.g. SDRAM / DDR) within TPL.
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config STM32_SDRAM
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bool "Enable STM32 SDRAM support"
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depends on RAM
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help
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STM32F7 family devices support flexible memory controller(FMC) to
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support external memories like sdram, psram & nand.
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This driver is for the sdram memory interface with the FMC.
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config MPC83XX_SDRAM
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bool "Enable MPC83XX SDRAM support"
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depends on RAM
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help
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Enable support for the internal DDR Memory Controller of the MPC83xx
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family of SoCs. Both static configurations, as well as configuring
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the RAM through the use of SPD (Serial Presence Detect) is supported
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via device tree settings.
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config K3_AM654_DDRSS
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bool "Enable AM654 DDRSS support"
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depends on RAM && SOC_K3_AM6
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help
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K3 based AM654 devices has DDR memory subsystem that comprises
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Synopys DDR controller, Synopsis DDR phy and wrapper logic to
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intergrate these blocks into the device. This DDR subsystem
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provides an interface to external SDRAM devices. Enabling this
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config add support for the initialization of the external
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SDRAM devices connected to DDR subsystem.
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config K3_DDRSS
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bool "Enable K3 DDRSS support"
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depends on RAM
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choice
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depends on K3_DDRSS
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prompt "K3 DDRSS Arch Support"
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default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2
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default K3_AM64_DDRSS if SOC_K3_AM642
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default K3_AM64_DDRSS if SOC_K3_AM625
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config K3_J721E_DDRSS
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bool "Enable J721E DDRSS support"
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help
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The J721E DDR subsystem comprises DDR controller, DDR PHY and
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wrapper logic to integrate these blocks in the device. The DDR
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subsystem is used to provide an interface to external SDRAM
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devices which can be utilized for storing program or data.
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Enabling this config adds support for the DDR memory controller
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on J721E family of SoCs.
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config K3_AM64_DDRSS
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bool "Enable AM64 DDRSS support"
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help
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The AM64 DDR subsystem comprises DDR controller, DDR PHY and
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wrapper logic to integrate these blocks in the device. The DDR
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subsystem is used to provide an interface to external SDRAM
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devices which can be utilized for storing program or data.
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Enabling this config adds support for the DDR memory controller
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on AM642 family of SoCs.
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endchoice
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config IMXRT_SDRAM
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bool "Enable i.MXRT SDRAM support"
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depends on RAM
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help
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i.MXRT family devices support smart external memory controller(SEMC)
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to support external memories like sdram, psram & nand.
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This driver is for the sdram memory interface with the SEMC.
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source "drivers/ram/aspeed/Kconfig"
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source "drivers/ram/rockchip/Kconfig"
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source "drivers/ram/sifive/Kconfig"
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source "drivers/ram/stm32mp1/Kconfig"
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source "drivers/ram/octeon/Kconfig"
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