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https://github.com/AsahiLinux/u-boot
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MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. The patch contains initial wiring and configuration for initial HW design with memory, cpu, interrupt controller, timers and uartlite console (interrupt controller is listed but U-Boot is not using it). Provided DT is just describing one configuration and should be taken only as example. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
24 lines
836 B
Makefile
24 lines
836 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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dtb-$(CONFIG_TARGET_ANDES_AE350) += ae350_32.dtb ae350_64.dtb
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dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += mpfs-icicle-kit.dtb
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dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt32.dtb qemu-virt64.dtb
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dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
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dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
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dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2.dtb
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dtb-$(CONFIG_TARGET_TH1520_LPI4A) += th1520-lichee-pi-4a.dtb
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dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-mbv32.dtb
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include $(srctree)/scripts/Makefile.dts
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targets += $(dtb-y)
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DTC_FLAGS += -R 4 -p 0x1000
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PHONY += dtbs
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dtbs: $(addprefix $(obj)/, $(dtb-y))
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@:
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clean-files := *.dtb
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