u-boot/arch/riscv/cpu
Lukas Auer c7e1effb96 riscv: support SPL stack and global data relocation
To support relocation of the stack and global data on RISC-V, the
secondary harts must be notified of the change using IPIs. We can reuse
the hart relocation code for this purpose. It uses global data to store
the new stack pointer and global data pointer for the secondary harts.
This means that we cannot update the global data pointer of the main
hart in spl_relocate_stack_gd(), because the secondary harts have not
yet been relocated at this point. It is updated after the secondary
harts have been notified.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-08-26 16:07:42 +08:00
..
ax25 riscv: add run mode configuration for SPL 2019-08-26 16:07:42 +08:00
generic riscv: add SPL support 2019-08-26 16:07:42 +08:00
cpu.c riscv: add run mode configuration for SPL 2019-08-26 16:07:42 +08:00
Makefile riscv: Move trap handler codes to mtrap.S 2018-12-18 09:56:27 +08:00
mtrap.S riscv: Return to previous privilege level after trap handling 2018-12-18 09:56:27 +08:00
start.S riscv: support SPL stack and global data relocation 2019-08-26 16:07:42 +08:00
u-boot-spl.lds riscv: add SPL support 2019-08-26 16:07:42 +08:00
u-boot.lds riscv: Make start.S available for all targets 2018-10-03 17:48:14 +08:00