mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-29 02:42:16 +00:00
715cce65b8
This converts the following to Kconfig: CONFIG_SYS_NAND_DBW_8 CONFIG_SYS_NAND_DBW_16 Note that all instances of the code check for CONFIG_SYS_NAND_DBW_16 being defined, and then "else" to CONFIG_SYS_NAND_DBW_8 whereas all of the configs set CONFIG_SYS_NAND_DBW_8. So we introduce CONFIG_SYS_NAND_DBW_16 as an option. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
38 lines
966 B
C
38 lines
966 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* (C) Copyright 2007-2008
|
|
* Stelian Pop <stelian@popies.net>
|
|
* Lead Tech Design <www.leadtechdesign.com>
|
|
*
|
|
* Configuation settings for the AT91SAM9RLEK board.
|
|
*/
|
|
|
|
#ifndef __CONFIG_H
|
|
#define __CONFIG_H
|
|
|
|
#include <asm/hardware.h>
|
|
|
|
/* ARM asynchronous clock */
|
|
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
|
|
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
|
|
|
|
/* SDRAM */
|
|
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
|
|
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
|
|
|
|
#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024)
|
|
#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM
|
|
|
|
/* NAND flash */
|
|
#ifdef CONFIG_CMD_NAND
|
|
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
|
/* our ALE is AD21 */
|
|
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
|
|
/* our CLE is AD22 */
|
|
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
|
|
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
|
|
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
|
|
|
|
#endif
|
|
|
|
#endif
|