Ye Li 6c01ca0a53 imx8ulp_evk: Update DDR ports arbitration for DCNANO underrun ... To resolve DCNANO underrun issue, change the DDR Port 0 arbitration from round robin fashion to fixed priority level 1, while other ports are not assigned any priority, so they will be serviced in round robin fashion if there is no active request from Port 0. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>		2023-03-29 20:15:42 +02:00
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imx8ulp_evk.c	imx: imx8ulp: Adjust handshake to sync TRDC and XRDC completion	2023-03-29 20:15:42 +02:00
Kconfig	nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig	2022-07-05 17:03:02 -04:00
lpddr4_timing.c	imx8ulp_evk: Update DDR ports arbitration for DCNANO underrun	2023-03-29 20:15:42 +02:00
lpddr4_timing_266.c	imx8ulp_evk: Update DDR ports arbitration for DCNANO underrun	2023-03-29 20:15:42 +02:00
MAINTAINERS	arm: imx: add i.MX8ULP EVK support	2021-08-09 14:46:51 +02:00
Makefile	imx8ulp_evk: Change to use DDR driver	2023-03-29 20:15:42 +02:00
spl.c	imx: imx8ulp: Configure XRDC PDAC and MSC for DBD owner=S400 only	2023-03-29 20:15:42 +02:00