mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 10:18:38 +00:00
35b65dd8ef
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
146 lines
2.7 KiB
C
146 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2018 NXP
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <env.h>
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#include <errno.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <linux/libfdt.h>
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#include <fdt_support.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sci/sci.h>
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#include <asm/arch/imx8-pins.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/sys_proto.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
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(SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
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(SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
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(SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
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static iomux_cfg_t uart0_pads[] = {
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SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
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}
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int board_early_init_f(void)
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{
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sc_pm_clock_rate_t rate = SC_80MHZ;
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int ret;
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/* Set UART0 clock root to 80 MHz */
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ret = sc_pm_setup_uart(SC_R_UART_0, rate);
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if (ret)
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return ret;
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setup_iomux_uart();
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sc_pm_set_resource_power_mode(-1, SC_R_GPIO_5, SC_PM_PW_MODE_ON);
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return 0;
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}
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#if CONFIG_IS_ENABLED(DM_GPIO)
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static void board_gpio_init(void)
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{
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/* TODO */
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}
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#else
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static inline void board_gpio_init(void) {}
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#endif
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#if IS_ENABLED(CONFIG_FEC_MXC)
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#include <miiphy.h>
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int board_phy_config(struct phy_device *phydev)
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{
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
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if (phydev->drv->config)
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phydev->drv->config(phydev);
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return 0;
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}
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#endif
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int checkboard(void)
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{
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puts("Board: iMX8QM MEK\n");
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build_info();
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print_bootinfo();
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return 0;
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}
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int board_init(void)
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{
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/* Power up base board */
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sc_pm_set_resource_power_mode(-1, SC_R_BOARD_R1, SC_PM_PW_MODE_ON);
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board_gpio_init();
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return 0;
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}
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/*
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* Board specific reset that is system reset.
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*/
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void reset_cpu(void)
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{
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/* TODO */
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}
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#ifdef CONFIG_OF_BOARD_SETUP
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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return 0;
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}
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#endif
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int board_mmc_get_env_dev(int devno)
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{
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return devno;
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}
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int board_late_init(void)
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{
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char *fdt_file;
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bool m4_booted;
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#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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env_set("board_name", "MEK");
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env_set("board_rev", "iMX8QM");
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#endif
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fdt_file = env_get("fdt_file");
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m4_booted = m4_parts_booted();
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if (fdt_file && !strcmp(fdt_file, "undefined")) {
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if (m4_booted)
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env_set("fdt_file", "imx8qm-mek-rpmsg.dtb");
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else
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env_set("fdt_file", "imx8qm-mek.dtb");
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}
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return 0;
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}
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