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6a3e4274e4
The PLL for the DRAM interface must be initialized in SPL, but the others can be delayed until U-Boot proper. Move them from SPL to U-Boot proper to save the precious SPL memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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| .. | ||
| clk-ld4.c | ||
| clk-ld11.c | ||
| clk-ld20.c | ||
| clk-pro4.c | ||
| clk-pro5.c | ||
| clk-pxs2.c | ||
| dpll-tail.c | ||
| Makefile | ||
| pll-ld4.c | ||
| pll-pro4.c | ||
| pll-sld3.c | ||
| pll.h | ||