mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
ARM: uniphier: add clock/reset settings for xHCI of ProXstream2
Deassert resets and enable clock signals of xHCI blocks if the corresponding CONFIG is enabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
parent
be44a4679f
commit
29d63a59ea
2 changed files with 13 additions and 2 deletions
|
@ -4,6 +4,7 @@
|
|||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "../init.h"
|
||||
|
@ -32,12 +33,16 @@ void uniphier_pxs2_clk_init(void)
|
|||
tmp |= SC_RSTCTRL2_NRST_USB3B1;
|
||||
writel(tmp, SC_RSTCTRL2);
|
||||
readl(SC_RSTCTRL2); /* dummy read */
|
||||
|
||||
tmp = readl(SC_RSTCTRL6);
|
||||
tmp |= 0x37;
|
||||
writel(tmp, SC_RSTCTRL6);
|
||||
#endif
|
||||
|
||||
/* provide clocks */
|
||||
tmp = readl(SC_CLKCTRL);
|
||||
#ifdef CONFIG_USB_XHCI_UNIPHIER
|
||||
tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
|
||||
tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
|
||||
SC_CLKCTRL_CEN_GIO;
|
||||
#endif
|
||||
#ifdef CONFIG_UNIPHIER_ETH
|
||||
|
|
|
@ -1,7 +1,9 @@
|
|||
/*
|
||||
* UniPhier SC (System Control) block registers
|
||||
*
|
||||
* Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
|
||||
* Copyright (C) 2011-2015 Panasonic Corporation
|
||||
* Copyright (C) 2015-2016 Socionext Inc.
|
||||
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
@ -68,6 +70,10 @@
|
|||
#define SC_RSTCTRL4_NRST_UMC31 (0x1 << 5) /* UMC ch1 */
|
||||
#define SC_RSTCTRL4_NRST_UMC30 (0x1 << 4) /* UMC ch0 */
|
||||
|
||||
#define SC_RSTCTRL5 (SC_BASE_ADDR | 0x2010)
|
||||
|
||||
#define SC_RSTCTRL6 (SC_BASE_ADDR | 0x2014)
|
||||
|
||||
#define SC_CLKCTRL (SC_BASE_ADDR | 0x2104)
|
||||
#define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */
|
||||
#define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */
|
||||
|
|
Loading…
Reference in a new issue