mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-21 02:33:07 +00:00
0672e9803b
Due to board limitation some SSD's would work on rock960 PCIe M.2 only with 1.8V IO domain. So, this patch enables grf io_sel explicitly to make PCIe/M.2 to work. Cc: Tom Cubie <tom@radxa.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
28 lines
639 B
C
28 lines
639 B
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <syscon.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch-rockchip/clock.h>
|
|
#include <asm/arch-rockchip/grf_rk3399.h>
|
|
#include <asm/arch-rockchip/hardware.h>
|
|
#include <linux/bitops.h>
|
|
|
|
#ifdef CONFIG_MISC_INIT_R
|
|
int misc_init_r(void)
|
|
{
|
|
struct rk3399_grf_regs *grf =
|
|
syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
|
|
|
|
/**
|
|
* Some SSD's to work on rock960 would require explicit
|
|
* domain voltage change, so BT565 is in 1.8v domain
|
|
*/
|
|
rk_setreg(&grf->io_vsel, BIT(0));
|
|
|
|
return 0;
|
|
}
|
|
#endif
|