Marek Vasut 07252f6f7e ddr: altera: Add ECC DRAM scrubbing support for Arria10 ... The SDRAM must first be rewritten by zeroes if ECC is used to initialize the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a case. This scrubbing implementation turns the caches on temporarily, then overwrites the whole RAM with zeroes, flushes the caches and turns them off again. This provides satisfactory performance. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>		2018-07-12 09:22:12 +02:00
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Kconfig	configs: Add DDR Kconfig support for Arria 10	2018-05-18 10:30:47 +02:00
Makefile	ddr: altera: stratix10: Add DDR support for Stratix10 SoC	2018-07-12 09:22:12 +02:00
sdram_arria10.c	ddr: altera: Add ECC DRAM scrubbing support for Arria10	2018-07-12 09:22:12 +02:00
sdram_gen5.c	ARM: socfpga: Rename the gen5 sdram driver to more specific name	2018-05-18 10:30:47 +02:00
sdram_s10.c	ddr: altera: stratix10: Add DDR support for Stratix10 SoC	2018-07-12 09:22:12 +02:00
sequencer.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
sequencer.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00