Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-24 21:54:01 +00:00
Code Issues Projects Releases Packages Wiki Activity
u-boot/drivers/fpga
History
Michal Simek 6596270ecb arm64: versal: Rename versal_pm_request to xilinx_pm_request 
Use generic name instead of Versal specific because this should be also
used on ZynqMP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:01 +02:00
..
ACEX1K.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
altera.c arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table 2018-12-20 17:12:25 +01:00
cyclon2.c fpga: altera: cyclon2: Check function pointer before calling 2019-07-30 10:21:15 +02:00
fpga.c cmd: fpga: Add support to load secure bitstreams 2018-06-01 11:37:31 +02:00
ivm_core.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig arm64: versal: fpga: Add PL bit stream load support 2019-10-08 09:11:14 +02:00
lattice.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Makefile arm64: versal: fpga: Add PL bit stream load support 2019-10-08 09:11:14 +02:00
socfpga.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
socfpga_arria10.c fpga: arria10: Fix error in fpga pin configuration 2019-07-21 12:47:13 +02:00
socfpga_gen5.c arm: socfpga: fpga: fix type of local variable 2018-10-31 01:41:10 +01:00
spartan2.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
spartan3.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
stratix10.c ARM: socfpga: stratix10: Return valid error code from FPGA driver 2019-02-18 13:00:54 +01:00
stratixII.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
stratixv.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
versalpl.c arm64: versal: Rename versal_pm_request to xilinx_pm_request 2019-10-24 13:37:01 +02:00
virtex2.c fpga: virtex2: Add slave serial programming support 2019-07-30 10:20:06 +02:00
xilinx.c arm64: versal: fpga: Add PL bit stream load support 2019-10-08 09:11:14 +02:00
zynqmppl.c arm64: zynqmp: use firmware driver to get version 2019-10-08 09:55:11 +02:00
zynqpl.c arm: zynq: Add an info message about post config 2019-04-16 11:51:34 +02:00