Dave Liu b4983e16d1 fsl-ddr: use the 1T timing as default configuration ... For light loaded system, we use the 1T timing to gain better memory performance, but for some heavily loaded system, you have to add the 2T timing options to board files. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>		2009-01-23 17:03:14 -06:00
..
config.mk	mpc8641: Change 32-bit memory map	2008-11-10 10:10:04 -06:00
ddr.c	fsl-ddr: use the 1T timing as default configuration	2009-01-23 17:03:14 -06:00
law.c	mpc8641: Support 36-bit physical addressing	2008-11-10 10:10:05 -06:00
Makefile	FSL DDR: Convert MPC8641HPCN to new DDR code.	2008-08-27 02:06:02 +02:00
mpc8641hpcn.c	mpc8641: fix address-cells default in old .dts detection	2008-11-11 09:44:10 -06:00
u-boot.lds	Align end of bss by 4 bytes	2008-11-18 23:13:16 +01:00