mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 15:37:23 +00:00
b8a24e07b2
Add entry for 3732 MT/s mode of operation of the LPDDR4, in which case the DDR PLL has to be configured in 933 MHz mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> |
||
---|---|---|
.. | ||
altera | ||
fsl | ||
imx | ||
marvell | ||
microchip | ||
Kconfig |